i40iw: Replace the obsolete crypto hash interface with shash
This patch replaces the obsolete crypto hash interface with shash and resolves a build failure after merge of the rdma tree which is caused by the removal of crypto hash interface Removing CRYPTO_ALG_ASYNC from crypto_alloc_shash(), because it is by definition sync only Signed-off-by: Mustafa Ismail <mustafa.ismail@intel.com> Signed-off-by: Tatyana Nikolova <tatyana.e.nikolova@intel.com> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -52,6 +52,7 @@
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#include <rdma/iw_cm.h>
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#include <rdma/iw_portmap.h>
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#include <rdma/rdma_netlink.h>
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#include <crypto/hash.h>
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#include "i40iw_status.h"
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#include "i40iw_osdep.h"
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@ -39,6 +39,7 @@
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#include <linux/string.h>
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#include <linux/bitops.h>
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#include <net/tcp.h>
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#include <crypto/hash.h>
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/* get readq/writeq support for 32 bit kernels, use the low-first version */
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#include <linux/io-64-nonatomic-lo-hi.h>
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@ -171,12 +172,12 @@ struct i40iw_hw;
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u8 __iomem *i40iw_get_hw_addr(void *dev);
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void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp);
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enum i40iw_status_code i40iw_vf_wait_vchnl_resp(struct i40iw_sc_dev *dev);
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enum i40iw_status_code i40iw_ieq_check_mpacrc(struct hash_desc *desc, void *addr,
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enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc, void *addr,
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u32 length, u32 value);
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struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev, struct i40iw_puda_buf *buf);
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void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length, u32 seqnum);
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void i40iw_free_hash_desc(struct hash_desc *);
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enum i40iw_status_code i40iw_init_hash_desc(struct hash_desc *);
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void i40iw_free_hash_desc(struct shash_desc *);
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enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **);
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enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info,
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struct i40iw_puda_buf *buf);
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enum i40iw_status_code i40iw_cqp_sds_cmd(struct i40iw_sc_dev *dev,
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@ -729,7 +729,7 @@ void i40iw_puda_dele_resources(struct i40iw_sc_dev *dev,
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switch (rsrc->completion) {
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case PUDA_HASH_CRC_COMPLETE:
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i40iw_free_hash_desc(&rsrc->hash_desc);
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i40iw_free_hash_desc(rsrc->hash_desc);
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case PUDA_QP_CREATED:
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do {
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if (reset)
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@ -1142,7 +1142,7 @@ static enum i40iw_status_code i40iw_ieq_handle_partial(struct i40iw_puda_rsrc *i
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crcptr = txbuf->data + fpdu_len - 4;
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mpacrc = *(u32 *)crcptr;
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if (ieq->check_crc) {
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status = i40iw_ieq_check_mpacrc(&ieq->hash_desc, txbuf->data,
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status = i40iw_ieq_check_mpacrc(ieq->hash_desc, txbuf->data,
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(fpdu_len - 4), mpacrc);
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if (status) {
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i40iw_debug(ieq->dev, I40IW_DEBUG_IEQ,
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@ -1210,7 +1210,7 @@ static enum i40iw_status_code i40iw_ieq_process_buf(struct i40iw_puda_rsrc *ieq,
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crcptr = datap + fpdu_len - 4;
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mpacrc = *(u32 *)crcptr;
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if (ieq->check_crc)
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ret = i40iw_ieq_check_mpacrc(&ieq->hash_desc,
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ret = i40iw_ieq_check_mpacrc(ieq->hash_desc,
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datap, fpdu_len - 4, mpacrc);
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if (ret) {
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status = I40IW_ERR_MPA_CRC;
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@ -135,7 +135,7 @@ struct i40iw_puda_rsrc {
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u32 rxq_invalid_cnt;
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u32 tx_wqe_avail_cnt;
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bool check_crc;
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struct hash_desc hash_desc;
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struct shash_desc *hash_desc;
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struct list_head txpend;
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struct list_head bufpool; /* free buffers pool list for recv and xmit */
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u32 alloc_buf_count;
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@ -173,11 +173,11 @@ struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev,
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struct i40iw_puda_buf *buf);
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enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info,
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struct i40iw_puda_buf *buf);
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enum i40iw_status_code i40iw_ieq_check_mpacrc(struct hash_desc *desc,
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enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc,
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void *addr, u32 length, u32 value);
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enum i40iw_status_code i40iw_init_hash_desc(struct hash_desc *desc);
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enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc);
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void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp);
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void i40iw_free_hash_desc(struct hash_desc *desc);
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void i40iw_free_hash_desc(struct shash_desc *desc);
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void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length,
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u32 seqnum);
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#endif
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@ -1024,11 +1024,24 @@ void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
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* i40iw_init_hash_desc - initialize hash for crc calculation
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* @desc: cryption type
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*/
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enum i40iw_status_code i40iw_init_hash_desc(struct hash_desc *desc)
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enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc)
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{
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desc->tfm = crypto_alloc_hash("crc32c", 0, CRYPTO_ALG_ASYNC);
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if (IS_ERR(desc->tfm))
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struct crypto_shash *tfm;
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struct shash_desc *tdesc;
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tfm = crypto_alloc_shash("crc32c", 0, 0);
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if (IS_ERR(tfm))
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return I40IW_ERR_MPA_CRC;
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tdesc = kzalloc(sizeof(*tdesc) + crypto_shash_descsize(tfm),
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GFP_KERNEL);
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if (!tdesc) {
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crypto_free_shash(tfm);
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return I40IW_ERR_MPA_CRC;
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}
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tdesc->tfm = tfm;
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*desc = tdesc;
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return 0;
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}
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@ -1036,9 +1049,12 @@ enum i40iw_status_code i40iw_init_hash_desc(struct hash_desc *desc)
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* i40iw_free_hash_desc - free hash desc
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* @desc: to be freed
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*/
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void i40iw_free_hash_desc(struct hash_desc *desc)
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void i40iw_free_hash_desc(struct shash_desc *desc)
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{
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crypto_free_hash(desc->tfm);
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if (desc) {
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crypto_free_shash(desc->tfm);
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kfree(desc);
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}
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}
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/**
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@ -1065,21 +1081,19 @@ enum i40iw_status_code i40iw_alloc_query_fpm_buf(struct i40iw_sc_dev *dev,
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* @length: length of buffer
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* @value: value to be compared
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*/
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enum i40iw_status_code i40iw_ieq_check_mpacrc(struct hash_desc *desc,
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enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc,
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void *addr,
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u32 length,
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u32 value)
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{
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struct scatterlist sg;
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u32 crc = 0;
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int ret;
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enum i40iw_status_code ret_code = 0;
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crypto_hash_init(desc);
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sg_init_one(&sg, addr, length);
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ret = crypto_hash_update(desc, &sg, length);
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crypto_shash_init(desc);
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ret = crypto_shash_update(desc, addr, length);
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if (!ret)
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crypto_hash_final(desc, (u8 *)&crc);
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crypto_shash_final(desc, (u8 *)&crc);
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if (crc != value) {
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i40iw_pr_err("mpa crc check fail\n");
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ret_code = I40IW_ERR_MPA_CRC;
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