rtc: armada38x: Add support for Armada 7K/8K
The Armada 7K/8K use the same RTC IP than the Armada 38x. However the SOC integration differs in 2 points: - MBUS bridge timing initialization - IRQ configuration at SoC level Moreover the Armada 7K/8K have an issue preventing to get the interrupt from alarm 1. This commit allows to use alarm 2 for these A7K/8K but to still use alarm 1 for the Armada 38x. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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@ -1,9 +1,11 @@
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* Real Time Clock of the Armada 38x SoCs
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* Real Time Clock of the Armada 38x/7K/8K SoCs
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RTC controller for the Armada 38x SoCs
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RTC controller for the Armada 38x, 7K and 8K SoCs
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Required properties:
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- compatible : Should be "marvell,armada-380-rtc"
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- compatible : Should be one of the following:
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"marvell,armada-380-rtc" for Armada 38x SoC
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"marvell,armada-8k-rtc" for Aramda 7K/8K SoCs
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- reg: a list of base address and size pairs, one for each entry in
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reg-names
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- reg names: should contain:
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@ -24,18 +24,36 @@
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#define RTC_STATUS_ALARM1 BIT(0)
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#define RTC_STATUS_ALARM2 BIT(1)
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#define RTC_IRQ1_CONF 0x4
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#define RTC_IRQ2_CONF 0x8
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#define RTC_IRQ_AL_EN BIT(0)
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#define RTC_IRQ_FREQ_EN BIT(1)
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#define RTC_IRQ_FREQ_1HZ BIT(2)
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#define RTC_TIME 0xC
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#define RTC_ALARM1 0x10
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#define RTC_ALARM2 0x14
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/* Armada38x SoC registers */
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#define RTC_38X_BRIDGE_TIMING_CTL 0x0
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#define RTC_38X_PERIOD_OFFS 0
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#define RTC_38X_PERIOD_MASK (0x3FF << RTC_38X_PERIOD_OFFS)
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#define RTC_38X_READ_DELAY_OFFS 26
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#define RTC_38X_READ_DELAY_MASK (0x1F << RTC_38X_READ_DELAY_OFFS)
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/* Armada 7K/8K registers */
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#define RTC_8K_BRIDGE_TIMING_CTL0 0x0
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#define RTC_8K_WRCLK_PERIOD_OFFS 0
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#define RTC_8K_WRCLK_PERIOD_MASK (0xFFFF << RTC_8K_WRCLK_PERIOD_OFFS)
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#define RTC_8K_WRCLK_SETUP_OFFS 16
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#define RTC_8K_WRCLK_SETUP_MASK (0xFFFF << RTC_8K_WRCLK_SETUP_OFFS)
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#define RTC_8K_BRIDGE_TIMING_CTL1 0x4
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#define RTC_8K_READ_DELAY_OFFS 0
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#define RTC_8K_READ_DELAY_MASK (0xFFFF << RTC_8K_READ_DELAY_OFFS)
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#define RTC_8K_ISR 0x10
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#define RTC_8K_IMR 0x14
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#define RTC_8K_ALARM2 BIT(0)
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#define SOC_RTC_INTERRUPT 0x8
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#define SOC_RTC_ALARM1 BIT(0)
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#define SOC_RTC_ALARM2 BIT(1)
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@ -60,6 +78,8 @@ struct armada38x_rtc {
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};
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#define ALARM1 0
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#define ALARM2 1
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#define ALARM_REG(base, alarm) ((base) + (alarm) * sizeof(u32))
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struct armada38x_rtc_data {
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@ -102,6 +122,28 @@ static void rtc_update_38x_mbus_timing_params(struct armada38x_rtc *rtc)
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writel(reg, rtc->regs_soc + RTC_38X_BRIDGE_TIMING_CTL);
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}
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static void rtc_update_8k_mbus_timing_params(struct armada38x_rtc *rtc)
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{
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u32 reg;
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reg = readl(rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL0);
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reg &= ~RTC_8K_WRCLK_PERIOD_MASK;
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reg |= 0x3FF << RTC_8K_WRCLK_PERIOD_OFFS;
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reg &= ~RTC_8K_WRCLK_SETUP_MASK;
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reg |= 0x29 << RTC_8K_WRCLK_SETUP_OFFS;
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writel(reg, rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL0);
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reg = readl(rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL1);
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reg &= ~RTC_8K_READ_DELAY_MASK;
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reg |= 0x3F << RTC_8K_READ_DELAY_OFFS;
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writel(reg, rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL1);
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}
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static u32 read_rtc_register(struct armada38x_rtc *rtc, u8 rtc_reg)
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{
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return readl(rtc->regs + rtc_reg);
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}
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static u32 read_rtc_register_38x_wa(struct armada38x_rtc *rtc, u8 rtc_reg)
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{
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int i, index_max = 0, max = 0;
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@ -157,6 +199,17 @@ static void armada38x_unmask_interrupt(struct armada38x_rtc *rtc)
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writel(val | SOC_RTC_ALARM1_MASK, rtc->regs_soc + SOC_RTC_INTERRUPT);
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}
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static void armada8k_clear_isr(struct armada38x_rtc *rtc)
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{
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writel(RTC_8K_ALARM2, rtc->regs_soc + RTC_8K_ISR);
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}
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static void armada8k_unmask_interrupt(struct armada38x_rtc *rtc)
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{
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writel(RTC_8K_ALARM2, rtc->regs_soc + RTC_8K_IMR);
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}
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static int armada38x_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct armada38x_rtc *rtc = dev_get_drvdata(dev);
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@ -312,12 +365,24 @@ static const struct armada38x_rtc_data armada38x_data = {
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.alarm = ALARM1,
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};
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static const struct armada38x_rtc_data armada8k_data = {
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.update_mbus_timing = rtc_update_8k_mbus_timing_params,
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.read_rtc_reg = read_rtc_register,
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.clear_isr = armada8k_clear_isr,
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.unmask_interrupt = armada8k_unmask_interrupt,
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.alarm = ALARM2,
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};
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#ifdef CONFIG_OF
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static const struct of_device_id armada38x_rtc_of_match_table[] = {
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{
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.compatible = "marvell,armada-380-rtc",
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.data = &armada38x_data,
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},
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{
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.compatible = "marvell,armada-8k-rtc",
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.data = &armada8k_data,
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},
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{}
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};
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MODULE_DEVICE_TABLE(of, armada38x_rtc_of_match_table);
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