arm64: Enable 52-bit virtual addressing for 4k and 16k granule configs
Update Kconfig to permit 4k and 16k granule configurations to be built with 52-bit virtual addressing, now that all the prerequisites are in place. While at it, update the feature description so it matches on the appropriate feature bits depending on the page size. For simplicity, let's just keep ARM64_HAS_VA52 as the feature name. Note that LPA2 based 52-bit virtual addressing requires 52-bit physical addressing support to be enabled as well, as programming TCR.TxSZ to values below 16 is not allowed unless TCR.DS is set, which is what activates the 52-bit physical addressing support. While supporting the converse (52-bit physical addressing without 52-bit virtual addressing) would be possible in principle, let's keep things simple, by only allowing these features to be enabled at the same time. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20240214122845.2033971-85-ardb+git@google.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -368,7 +368,9 @@ config PGTABLE_LEVELS
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default 3 if ARM64_64K_PAGES && (ARM64_VA_BITS_48 || ARM64_VA_BITS_52)
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default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
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default 3 if ARM64_16K_PAGES && ARM64_VA_BITS_47
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default 4 if ARM64_16K_PAGES && (ARM64_VA_BITS_48 || ARM64_VA_BITS_52)
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default 4 if !ARM64_64K_PAGES && ARM64_VA_BITS_48
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default 5 if ARM64_4K_PAGES && ARM64_VA_BITS_52
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config ARCH_SUPPORTS_UPROBES
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def_bool y
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@ -396,13 +398,13 @@ config BUILTIN_RETURN_ADDRESS_STRIPS_PAC
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config KASAN_SHADOW_OFFSET
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hex
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depends on KASAN_GENERIC || KASAN_SW_TAGS
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default 0xdfff800000000000 if (ARM64_VA_BITS_48 || ARM64_VA_BITS_52) && !KASAN_SW_TAGS
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default 0xdfffc00000000000 if ARM64_VA_BITS_47 && !KASAN_SW_TAGS
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default 0xdfff800000000000 if (ARM64_VA_BITS_48 || (ARM64_VA_BITS_52 && !ARM64_16K_PAGES)) && !KASAN_SW_TAGS
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default 0xdfffc00000000000 if (ARM64_VA_BITS_47 || ARM64_VA_BITS_52) && ARM64_16K_PAGES && !KASAN_SW_TAGS
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default 0xdffffe0000000000 if ARM64_VA_BITS_42 && !KASAN_SW_TAGS
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default 0xdfffffc000000000 if ARM64_VA_BITS_39 && !KASAN_SW_TAGS
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default 0xdffffff800000000 if ARM64_VA_BITS_36 && !KASAN_SW_TAGS
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default 0xefff800000000000 if (ARM64_VA_BITS_48 || ARM64_VA_BITS_52) && KASAN_SW_TAGS
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default 0xefffc00000000000 if ARM64_VA_BITS_47 && KASAN_SW_TAGS
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default 0xefff800000000000 if (ARM64_VA_BITS_48 || (ARM64_VA_BITS_52 && !ARM64_16K_PAGES)) && KASAN_SW_TAGS
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default 0xefffc00000000000 if (ARM64_VA_BITS_47 || ARM64_VA_BITS_52) && ARM64_16K_PAGES && KASAN_SW_TAGS
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default 0xeffffe0000000000 if ARM64_VA_BITS_42 && KASAN_SW_TAGS
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default 0xefffffc000000000 if ARM64_VA_BITS_39 && KASAN_SW_TAGS
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default 0xeffffff800000000 if ARM64_VA_BITS_36 && KASAN_SW_TAGS
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@ -1310,7 +1312,7 @@ config ARM64_VA_BITS_48
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config ARM64_VA_BITS_52
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bool "52-bit"
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depends on ARM64_64K_PAGES && (ARM64_PAN || !ARM64_SW_TTBR0_PAN)
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depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN
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help
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Enable 52-bit virtual addressing for userspace when explicitly
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requested via a hint to mmap(). The kernel will also use 52-bit
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@ -1357,10 +1359,11 @@ choice
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config ARM64_PA_BITS_48
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bool "48-bit"
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depends on ARM64_64K_PAGES || !ARM64_VA_BITS_52
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config ARM64_PA_BITS_52
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bool "52-bit (ARMv8.2)"
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depends on ARM64_64K_PAGES
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bool "52-bit"
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depends on ARM64_64K_PAGES || ARM64_VA_BITS_52
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depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN
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help
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Enable support for a 52-bit physical address space, introduced as
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@ -2703,15 +2703,29 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
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},
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#ifdef CONFIG_ARM64_VA_BITS_52
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{
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.desc = "52-bit Virtual Addressing (LVA)",
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.capability = ARM64_HAS_VA52,
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.type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
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.sys_reg = SYS_ID_AA64MMFR2_EL1,
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.sign = FTR_UNSIGNED,
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.field_width = 4,
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.field_pos = ID_AA64MMFR2_EL1_VARange_SHIFT,
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.matches = has_cpuid_feature,
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.field_width = 4,
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#ifdef CONFIG_ARM64_64K_PAGES
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.desc = "52-bit Virtual Addressing (LVA)",
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.sign = FTR_SIGNED,
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.sys_reg = SYS_ID_AA64MMFR2_EL1,
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.field_pos = ID_AA64MMFR2_EL1_VARange_SHIFT,
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.min_field_value = ID_AA64MMFR2_EL1_VARange_52,
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#else
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.desc = "52-bit Virtual Addressing (LPA2)",
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.sys_reg = SYS_ID_AA64MMFR0_EL1,
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#ifdef CONFIG_ARM64_4K_PAGES
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.sign = FTR_SIGNED,
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.field_pos = ID_AA64MMFR0_EL1_TGRAN4_SHIFT,
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.min_field_value = ID_AA64MMFR0_EL1_TGRAN4_52_BIT,
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#else
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.sign = FTR_UNSIGNED,
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.field_pos = ID_AA64MMFR0_EL1_TGRAN16_SHIFT,
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.min_field_value = ID_AA64MMFR0_EL1_TGRAN16_52_BIT,
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#endif
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#endif
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},
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#endif
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{},
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