dmaengine: tegra210-adma: Re-order 'has_outstanding_reqs' member
The 'has_outstanding_reqs' member description order in structure 'tegra_adma_chip_data' does not match with the corresponding member declaration. The same is true for member assignment in chip data structures declared for Tegra210 and Tegra186. This is a trivial fix to re-order the mentioned member for a better readability. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/1631722025-19873-2-git-send-email-spujar@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -78,12 +78,12 @@ struct tegra_adma;
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* @ch_req_tx_shift: Register offset for AHUB transmit channel select.
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* @ch_req_rx_shift: Register offset for AHUB receive channel select.
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* @ch_base_offset: Register offset of DMA channel registers.
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* @has_outstanding_reqs: If DMA channel can have outstanding requests.
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* @ch_fifo_ctrl: Default value for channel FIFO CTRL register.
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* @ch_req_mask: Mask for Tx or Rx channel select.
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* @ch_req_max: Maximum number of Tx or Rx channels available.
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* @ch_reg_size: Size of DMA channel register space.
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* @nr_channels: Number of DMA channels available.
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* @has_outstanding_reqs: If DMA channel can have outstanding requests.
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*/
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struct tegra_adma_chip_data {
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unsigned int (*adma_get_burst_config)(unsigned int burst_size);
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@ -782,12 +782,12 @@ static const struct tegra_adma_chip_data tegra210_chip_data = {
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.ch_req_tx_shift = 28,
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.ch_req_rx_shift = 24,
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.ch_base_offset = 0,
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.has_outstanding_reqs = false,
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.ch_fifo_ctrl = TEGRA210_FIFO_CTRL_DEFAULT,
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.ch_req_mask = 0xf,
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.ch_req_max = 10,
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.ch_reg_size = 0x80,
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.nr_channels = 22,
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.has_outstanding_reqs = false,
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};
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static const struct tegra_adma_chip_data tegra186_chip_data = {
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@ -797,12 +797,12 @@ static const struct tegra_adma_chip_data tegra186_chip_data = {
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.ch_req_tx_shift = 27,
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.ch_req_rx_shift = 22,
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.ch_base_offset = 0x10000,
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.has_outstanding_reqs = true,
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.ch_fifo_ctrl = TEGRA186_FIFO_CTRL_DEFAULT,
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.ch_req_mask = 0x1f,
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.ch_req_max = 20,
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.ch_reg_size = 0x100,
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.nr_channels = 32,
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.has_outstanding_reqs = true,
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};
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static const struct of_device_id tegra_adma_of_match[] = {
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