clk: baikal-t1: Add shared xGMAC ref/ptp clocks internal parent
[ Upstream commit e2eef312762e0b5a5a70d29fe59a245c0a3cffa0 ] Baikal-T1 CCU reference manual says that both xGMAC reference and xGMAC PTP clocks are generated by two different wrappers with the same constant divider thus each producing a 156.25 MHz signal. But for some reason both of these clock sources are gated by a single switch-flag in the CCU registers space - CCU_SYS_XGMAC_BASE.BIT(0). In order to make the clocks handled independently we need to define a shared parental gate so the base clock signal would be switched off only if both of the child-clocks are disabled. Note the ID is intentionally set to -2 since we are going to add a one more internal clock identifier in the next commit. Fixes: 353afa3a8d2e ("clk: Add Baikal-T1 CCU Dividers driver") Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20220929225402.9696-4-Sergey.Semin@baikalelectronics.ru Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -579,6 +579,7 @@ struct ccu_div *ccu_div_hw_register(const struct ccu_div_init_data *div_init)
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goto err_free_div;
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}
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parent_data.fw_name = div_init->parent_name;
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parent_data.name = div_init->parent_name;
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hw_init.parent_data = &parent_data;
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hw_init.num_parents = 1;
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@ -13,6 +13,12 @@
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#include <linux/bits.h>
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#include <linux/of.h>
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/*
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* CCU Divider private clock IDs
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* @CCU_SYS_XGMAC_CLK: CCU XGMAC internal clock
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*/
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#define CCU_SYS_XGMAC_CLK -2
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/*
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* CCU Divider private flags
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* @CCU_DIV_SKIP_ONE: Due to some reason divider can't be set to 1.
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@ -204,10 +204,12 @@ static const struct ccu_div_info sys_info[] = {
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"eth_clk", CCU_SYS_GMAC1_BASE, 5),
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CCU_DIV_FIXED_INFO(CCU_SYS_GMAC1_PTP_CLK, "sys_gmac1_ptp_clk",
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"eth_clk", 10),
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CCU_DIV_GATE_INFO(CCU_SYS_XGMAC_REF_CLK, "sys_xgmac_ref_clk",
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"eth_clk", CCU_SYS_XGMAC_BASE, 8),
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CCU_DIV_GATE_INFO(CCU_SYS_XGMAC_CLK, "sys_xgmac_clk",
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"eth_clk", CCU_SYS_XGMAC_BASE, 1),
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CCU_DIV_FIXED_INFO(CCU_SYS_XGMAC_REF_CLK, "sys_xgmac_ref_clk",
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"sys_xgmac_clk", 8),
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CCU_DIV_FIXED_INFO(CCU_SYS_XGMAC_PTP_CLK, "sys_xgmac_ptp_clk",
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"eth_clk", 8),
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"sys_xgmac_clk", 8),
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CCU_DIV_GATE_INFO(CCU_SYS_USB_CLK, "sys_usb_clk",
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"eth_clk", CCU_SYS_USB_BASE, 10),
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CCU_DIV_VAR_INFO(CCU_SYS_PVT_CLK, "sys_pvt_clk",
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