brcmfmac: Add 43143 SDIO support.
Added sdio device id to list of supported devices. 43143 is a new 802.11n single stream device. Reviewed-by: Arend Van Spriel <arend@broadcom.com> Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com> Reviewed-by: Piotr Haber <phaber@broadcom.com> Signed-off-by: Hante Meuleman <meuleman@broadcom.com> Signed-off-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -40,6 +40,7 @@
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#define DMA_ALIGN_MASK 0x03
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#define DMA_ALIGN_MASK 0x03
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#define SDIO_DEVICE_ID_BROADCOM_43143 43143
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#define SDIO_DEVICE_ID_BROADCOM_43241 0x4324
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#define SDIO_DEVICE_ID_BROADCOM_43241 0x4324
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#define SDIO_DEVICE_ID_BROADCOM_4329 0x4329
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#define SDIO_DEVICE_ID_BROADCOM_4329 0x4329
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#define SDIO_DEVICE_ID_BROADCOM_4330 0x4330
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#define SDIO_DEVICE_ID_BROADCOM_4330 0x4330
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@ -51,6 +52,7 @@
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/* devices we support, null terminated */
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/* devices we support, null terminated */
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static const struct sdio_device_id brcmf_sdmmc_ids[] = {
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static const struct sdio_device_id brcmf_sdmmc_ids[] = {
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{SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_43143)},
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{SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_43241)},
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{SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_43241)},
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{SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4329)},
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{SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4329)},
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{SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4330)},
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{SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4330)},
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@ -3550,6 +3550,8 @@ static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
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static bool brcmf_sdbrcm_chipmatch(u16 chipid)
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static bool brcmf_sdbrcm_chipmatch(u16 chipid)
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{
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{
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if (chipid == BCM43143_CHIP_ID)
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return true;
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if (chipid == BCM43241_CHIP_ID)
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if (chipid == BCM43241_CHIP_ID)
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return true;
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return true;
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if (chipid == BCM4329_CHIP_ID)
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if (chipid == BCM4329_CHIP_ID)
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@ -40,6 +40,15 @@
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#define BCM4329_CORE_ARM_BASE 0x18002000
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#define BCM4329_CORE_ARM_BASE 0x18002000
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#define BCM4329_RAMSIZE 0x48000
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#define BCM4329_RAMSIZE 0x48000
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/* bcm43143 */
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/* SDIO device core */
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#define BCM43143_CORE_BUS_BASE 0x18002000
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/* internal memory core */
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#define BCM43143_CORE_SOCRAM_BASE 0x18004000
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/* ARM Cortex M3 core, ID 0x82a */
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#define BCM43143_CORE_ARM_BASE 0x18003000
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#define BCM43143_RAMSIZE 0x70000
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#define SBCOREREV(sbidh) \
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#define SBCOREREV(sbidh) \
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((((sbidh) & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT) | \
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((((sbidh) & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT) | \
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((sbidh) & SSB_IDHIGH_RCLO))
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((sbidh) & SSB_IDHIGH_RCLO))
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@ -433,6 +442,23 @@ static int brcmf_sdio_chip_recognition(struct brcmf_sdio_dev *sdiodev,
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/* Address of cores for new chips should be added here */
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/* Address of cores for new chips should be added here */
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switch (ci->chip) {
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switch (ci->chip) {
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case BCM43143_CHIP_ID:
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ci->c_inf[0].wrapbase = ci->c_inf[0].base + 0x00100000;
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ci->c_inf[0].cib = 0x2b000000;
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ci->c_inf[1].id = BCMA_CORE_SDIO_DEV;
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ci->c_inf[1].base = BCM43143_CORE_BUS_BASE;
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ci->c_inf[1].wrapbase = ci->c_inf[1].base + 0x00100000;
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ci->c_inf[1].cib = 0x18000000;
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ci->c_inf[2].id = BCMA_CORE_INTERNAL_MEM;
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ci->c_inf[2].base = BCM43143_CORE_SOCRAM_BASE;
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ci->c_inf[2].wrapbase = ci->c_inf[2].base + 0x00100000;
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ci->c_inf[2].cib = 0x14000000;
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ci->c_inf[3].id = BCMA_CORE_ARM_CM3;
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ci->c_inf[3].base = BCM43143_CORE_ARM_BASE;
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ci->c_inf[3].wrapbase = ci->c_inf[3].base + 0x00100000;
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ci->c_inf[3].cib = 0x07000000;
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ci->ramsize = BCM43143_RAMSIZE;
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break;
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case BCM43241_CHIP_ID:
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case BCM43241_CHIP_ID:
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ci->c_inf[0].wrapbase = 0x18100000;
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ci->c_inf[0].wrapbase = 0x18100000;
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ci->c_inf[0].cib = 0x2a084411;
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ci->c_inf[0].cib = 0x2a084411;
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@ -29,6 +29,7 @@
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/* Chipcommon Core Chip IDs */
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/* Chipcommon Core Chip IDs */
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#define BCM4313_CHIP_ID 0x4313
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#define BCM4313_CHIP_ID 0x4313
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#define BCM43143_CHIP_ID 43143
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#define BCM43224_CHIP_ID 43224
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#define BCM43224_CHIP_ID 43224
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#define BCM43225_CHIP_ID 43225
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#define BCM43225_CHIP_ID 43225
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#define BCM43235_CHIP_ID 43235
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#define BCM43235_CHIP_ID 43235
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