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ata: ahci_brcm: Avoid clobbering SATA_TOP_CTRL_BUS_CTRL

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We are doing a blind write to SATA_TOP_CTRL_BUS_CTRL to set the system
endian, but in doing so, we are also overwriting other bits, such as the
SATA_SCB_BURST_SIZE and SATA_FIFO_SIZE bits, which impact performance.
Do a read/modify/write so we keep the default values.

While we are at it, we also greatly simplify the logic and just leave
the NSP specific bit settings, instead of having a completely different
sequence.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
This commit is contained in:
Florian Fainelli 2017-12-22 11:43:08 -08:00 committed by Tejun Heo
parent ebb82e3c79
commit 36fffd6a1f
1 changed files with 15 additions and 10 deletions
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25
drivers/ata/ahci_brcm.c
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@ -70,6 +70,13 @@
(DATA_ENDIAN << DMADESC_ENDIAN_SHIFT) | \
(MMIO_ENDIAN << MMIO_ENDIAN_SHIFT))
#define BUS_CTRL_ENDIAN_NSP_CONF \
(0x02 << DMADATA_ENDIAN_SHIFT | 0x02 << DMADESC_ENDIAN_SHIFT)
#define BUS_CTRL_ENDIAN_CONF_MASK \
(0x3 << MMIO_ENDIAN_SHIFT | 0x3 << DMADESC_ENDIAN_SHIFT | \
0x3 << DMADATA_ENDIAN_SHIFT | 0x3 << PIODATA_ENDIAN_SHIFT)
enum brcm_ahci_version {
BRCM_SATA_BCM7425 = 1,
BRCM_SATA_BCM7445,
@ -250,18 +257,16 @@ static u32 brcm_ahci_get_portmask(struct platform_device *pdev,
static void brcm_sata_init(struct brcm_ahci_priv *priv)
{
void __iomem *ctrl = priv->top_ctrl + SATA_TOP_CTRL_BUS_CTRL;
u32 data;
/* Configure endianness */
if (priv->version == BRCM_SATA_NSP) {
u32 data = brcm_sata_readreg(ctrl);
data &= ~((0x03 << DMADATA_ENDIAN_SHIFT) |
(0x03 << DMADESC_ENDIAN_SHIFT));
data |= (0x02 << DMADATA_ENDIAN_SHIFT) |
(0x02 << DMADESC_ENDIAN_SHIFT);
brcm_sata_writereg(data, ctrl);
} else
brcm_sata_writereg(BUS_CTRL_ENDIAN_CONF, ctrl);
data = brcm_sata_readreg(ctrl);
data &= ~BUS_CTRL_ENDIAN_CONF_MASK;
if (priv->version == BRCM_SATA_NSP)
data |= BUS_CTRL_ENDIAN_NSP_CONF;
else
data |= BUS_CTRL_ENDIAN_CONF;
brcm_sata_writereg(data, ctrl);
}
#ifdef CONFIG_PM_SLEEP