From 374b30f27f1ae5a88c7f2868ec4abff9fc14d679 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Thu, 24 Nov 2022 13:39:07 +0100 Subject: [PATCH] earlycon: Let users set the clock frequency Some platforms, namely AMD Picasso, use non standard uart clocks (48M), witch makes it impossible to use with earlycon. Let the user select its own frequency. Signed-off-by: Ricardo Ribalda Reviewed-by: Jiri Slaby Link: https://lore.kernel.org/r/20221123-serial-clk-v3-1-49c516980ae0@chromium.org Signed-off-by: Greg Kroah-Hartman --- Documentation/admin-guide/kernel-parameters.txt | 12 +++++++----- drivers/tty/serial/earlycon.c | 9 ++++++++- 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 6cfa6e3996cf..b50bdee88964 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1195,10 +1195,10 @@ specified, the serial port must already be setup and configured. - uart[8250],io,[,options] - uart[8250],mmio,[,options] - uart[8250],mmio32,[,options] - uart[8250],mmio32be,[,options] + uart[8250],io,[,options[,uartclk]] + uart[8250],mmio,[,options[,uartclk]] + uart[8250],mmio32,[,options[,uartclk]] + uart[8250],mmio32be,[,options[,uartclk]] uart[8250],0x[,options] Start an early, polled-mode console on the 8250/16550 UART at the specified I/O port or MMIO address. @@ -1207,7 +1207,9 @@ If none of [io|mmio|mmio32|mmio32be], is assumed to be equivalent to 'mmio'. 'options' are specified in the same format described for "console=ttyS"; if - unspecified, the h/w is not initialized. + unspecified, the h/w is not initialized. 'uartclk' is + the uart clock frequency; if unspecified, it is set + to 'BASE_BAUD' * 16. pl011, pl011,mmio32, diff --git a/drivers/tty/serial/earlycon.c b/drivers/tty/serial/earlycon.c index 4f6e9bf57169..a5fbb6ed38ae 100644 --- a/drivers/tty/serial/earlycon.c +++ b/drivers/tty/serial/earlycon.c @@ -120,7 +120,13 @@ static int __init parse_options(struct earlycon_device *device, char *options) } if (options) { + char *uartclk; + device->baud = simple_strtoul(options, NULL, 0); + uartclk = strchr(options, ','); + if (uartclk && kstrtouint(uartclk + 1, 0, &port->uartclk) < 0) + pr_warn("[%s] unsupported earlycon uart clkrate option\n", + options); length = min(strcspn(options, " ") + 1, (size_t)(sizeof(device->options))); strscpy(device->options, options, length); @@ -139,7 +145,8 @@ static int __init register_earlycon(char *buf, const struct earlycon_id *match) buf = NULL; spin_lock_init(&port->lock); - port->uartclk = BASE_BAUD * 16; + if (!port->uartclk) + port->uartclk = BASE_BAUD * 16; if (port->mapbase) port->membase = earlycon_map(port->mapbase, 64);