drm/virtio: rework virtio_gpu_transfer_from_host_ioctl fencing
Switch to the virtio_gpu_array_* helper workflow. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Chia-I Wu <olvaffe@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-11-kraxel@redhat.com
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@ -323,9 +323,10 @@ void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_object_array *objs,
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struct virtio_gpu_fence *fence);
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void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
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uint32_t resource_id, uint32_t ctx_id,
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uint32_t ctx_id,
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uint64_t offset, uint32_t level,
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struct virtio_gpu_box *box,
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struct virtio_gpu_object_array *objs,
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struct virtio_gpu_fence *fence);
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void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_object *bo,
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@ -340,9 +340,7 @@ static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
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struct virtio_gpu_device *vgdev = dev->dev_private;
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struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
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struct drm_virtgpu_3d_transfer_from_host *args = data;
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struct ttm_operation_ctx ctx = { true, false };
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struct drm_gem_object *gobj = NULL;
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struct virtio_gpu_object *qobj = NULL;
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struct virtio_gpu_object_array *objs;
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struct virtio_gpu_fence *fence;
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int ret;
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u32 offset = args->offset;
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@ -351,39 +349,31 @@ static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
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if (vgdev->has_virgl_3d == false)
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return -ENOSYS;
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gobj = drm_gem_object_lookup(file, args->bo_handle);
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if (gobj == NULL)
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objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1);
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if (objs == NULL)
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return -ENOENT;
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qobj = gem_to_virtio_gpu_obj(gobj);
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ret = virtio_gpu_object_reserve(qobj);
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if (ret)
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goto out;
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ret = ttm_bo_validate(&qobj->tbo, &qobj->placement, &ctx);
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if (unlikely(ret))
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goto out_unres;
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ret = virtio_gpu_array_lock_resv(objs);
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if (ret != 0)
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goto err_put_free;
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convert_to_hw_box(&box, &args->box);
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fence = virtio_gpu_fence_alloc(vgdev);
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if (!fence) {
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ret = -ENOMEM;
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goto out_unres;
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goto err_unlock;
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}
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virtio_gpu_cmd_transfer_from_host_3d
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(vgdev, qobj->hw_res_handle,
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vfpriv->ctx_id, offset, args->level,
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&box, fence);
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dma_resv_add_excl_fence(qobj->tbo.base.resv,
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&fence->f);
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(vgdev, vfpriv->ctx_id, offset, args->level,
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&box, objs, fence);
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dma_fence_put(&fence->f);
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out_unres:
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virtio_gpu_object_unreserve(qobj);
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out:
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drm_gem_object_put_unlocked(gobj);
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return 0;
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err_unlock:
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virtio_gpu_array_unlock_resv(objs);
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err_put_free:
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virtio_gpu_array_put_free(objs);
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return ret;
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}
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@ -929,20 +929,24 @@ void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
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}
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void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
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uint32_t resource_id, uint32_t ctx_id,
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uint32_t ctx_id,
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uint64_t offset, uint32_t level,
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struct virtio_gpu_box *box,
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struct virtio_gpu_object_array *objs,
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struct virtio_gpu_fence *fence)
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{
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struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(objs->objs[0]);
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struct virtio_gpu_transfer_host_3d *cmd_p;
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struct virtio_gpu_vbuffer *vbuf;
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cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
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memset(cmd_p, 0, sizeof(*cmd_p));
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vbuf->objs = objs;
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cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D);
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cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id);
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cmd_p->resource_id = cpu_to_le32(resource_id);
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cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle);
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cmd_p->box = *box;
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cmd_p->offset = cpu_to_le64(offset);
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cmd_p->level = cpu_to_le32(level);
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