ASoC: rsnd: src: make sure SRC soft reset
Renesas SCU (Sampling Rate Convert Unit) includes SRC/CTU/MIX/DVC, and these have similar register. xxxRSR (Software reset Register) is one of them. These xxxRSR need be set to 1 to 0 when software reset. Current rsnd driver has src.c / dvc.c, and we will have mix.c. It is readable if these have same named function. This patch adds rsnd_src_soft_reset() and make sure it Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -118,6 +118,12 @@ struct rsnd_src {
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/*
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/*
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* Gen1/Gen2 common functions
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* Gen1/Gen2 common functions
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*/
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*/
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static void rsnd_src_soft_reset(struct rsnd_mod *mod)
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{
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rsnd_mod_write(mod, SRC_SWRSR, 0);
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rsnd_mod_write(mod, SRC_SWRSR, 1);
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}
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static struct dma_chan *rsnd_src_dma_req(struct rsnd_dai_stream *io,
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static struct dma_chan *rsnd_src_dma_req(struct rsnd_dai_stream *io,
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struct rsnd_mod *mod)
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struct rsnd_mod *mod)
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{
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{
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@ -294,10 +300,6 @@ static int rsnd_src_set_convert_rate(struct rsnd_mod *mod,
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if (convert_rate)
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if (convert_rate)
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fsrate = 0x0400000 / convert_rate * runtime->rate;
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fsrate = 0x0400000 / convert_rate * runtime->rate;
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/* set/clear soft reset */
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rsnd_mod_write(mod, SRC_SWRSR, 0);
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rsnd_mod_write(mod, SRC_SWRSR, 1);
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/* Set channel number and output bit length */
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/* Set channel number and output bit length */
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rsnd_mod_write(mod, SRC_ADINR, rsnd_get_adinr(mod, io));
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rsnd_mod_write(mod, SRC_ADINR, rsnd_get_adinr(mod, io));
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@ -358,6 +360,8 @@ static int rsnd_src_init(struct rsnd_mod *mod,
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rsnd_mod_hw_start(mod);
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rsnd_mod_hw_start(mod);
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rsnd_src_soft_reset(mod);
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src->err = 0;
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src->err = 0;
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/* reset sync convert_rate */
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/* reset sync convert_rate */
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