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pinctrl: renesas: r8a779f0: Add PCIe pins, groups, and function

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Add pins, groups, and function for the PCIe Controllers on the Renesas
R-Car S4-8 (R8A779F0) SoC.

Extracted from a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/b2f95db490d13e8cb7d97a63d58d47933317e28a.1645457792.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2022-02-21 16:43:45 +01:00
parent 8aaeadb008
commit 384484a509
1 changed files with 27 additions and 0 deletions
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27
drivers/pinctrl/renesas/pfc-r8a779f0.c
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@ -898,6 +898,25 @@ static const unsigned int msiof3_rxd_mux[] = {
MSIOF3_RXD_MARK,
};
/* - PCIE ------------------------------------------------------------------- */
static const unsigned int pcie0_clkreq_n_pins[] = {
/* PCIE0_CLKREQ# */
RCAR_GP_PIN(2, 15),
};
static const unsigned int pcie0_clkreq_n_mux[] = {
PCIE0_CLKREQ_N_MARK,
};
static const unsigned int pcie1_clkreq_n_pins[] = {
/* PCIE1_CLKREQ# */
RCAR_GP_PIN(2, 16),
};
static const unsigned int pcie1_clkreq_n_mux[] = {
PCIE1_CLKREQ_N_MARK,
};
/* - SCIF0 ------------------------------------------------------------------ */
static const unsigned int scif0_data_pins[] = {
/* RX0, TX0 */
@ -1055,6 +1074,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(msiof3_ss2),
SH_PFC_PIN_GROUP(msiof3_txd),
SH_PFC_PIN_GROUP(msiof3_rxd),
SH_PFC_PIN_GROUP(pcie0_clkreq_n),
SH_PFC_PIN_GROUP(pcie1_clkreq_n),
SH_PFC_PIN_GROUP(scif0_data),
SH_PFC_PIN_GROUP(scif0_clk),
SH_PFC_PIN_GROUP(scif0_ctrl),
@ -1173,6 +1194,11 @@ static const char * const msiof3_groups[] = {
"msiof3_rxd",
};
static const char * const pcie_groups[] = {
"pcie0_clkreq_n",
"pcie1_clkreq_n",
};
static const char * const scif0_groups[] = {
"scif0_data",
"scif0_clk",
@ -1218,6 +1244,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(msiof1),
SH_PFC_FUNCTION(msiof2),
SH_PFC_FUNCTION(msiof3),
SH_PFC_FUNCTION(pcie),
SH_PFC_FUNCTION(scif0),
SH_PFC_FUNCTION(scif1),
SH_PFC_FUNCTION(scif3),