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powerps/pseries/dma: Add support for 2M IOMMU page size

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The upcoming PAPR spec adds a 2M page size, bit 23 right after 16G page
size in the "ibm,query-pe-dma-window" call.

This adds support for the new page size. Since the new page size is out
of sorted order, this changes the loop to not assume that shift[] is
sorted.

This has now been tested and is known to work on a pre-release version
of phyp.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Leonardo Bras <leobras.c@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211006044735.1114669-1-aik@ozlabs.ru
This commit is contained in:
Alexey Kardashevskiy 2021-10-06 15:47:35 +11:00 committed by Michael Ellerman
parent e4e737bb5c
commit 3872731187
1 changed files with 5 additions and 5 deletions
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10
arch/powerpc/platforms/pseries/iommu.c
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@ -1159,14 +1159,15 @@ static void reset_dma_window(struct pci_dev *dev, struct device_node *par_dn)
/* Return largest page shift based on "IO Page Sizes" output of ibm,query-pe-dma-window. */
static int iommu_get_page_shift(u32 query_page_size)
{
/* Supported IO page-sizes according to LoPAR */
/* Supported IO page-sizes according to LoPAR, note that 2M is out of order */
const int shift[] = {
__builtin_ctzll(SZ_4K), __builtin_ctzll(SZ_64K), __builtin_ctzll(SZ_16M),
__builtin_ctzll(SZ_32M), __builtin_ctzll(SZ_64M), __builtin_ctzll(SZ_128M),
__builtin_ctzll(SZ_256M), __builtin_ctzll(SZ_16G)
__builtin_ctzll(SZ_256M), __builtin_ctzll(SZ_16G), __builtin_ctzll(SZ_2M)
};
int i = ARRAY_SIZE(shift) - 1;
int ret = 0;
/*
* On LoPAR, ibm,query-pe-dma-window outputs "IO Page Sizes" using a bit field:
@ -1176,11 +1177,10 @@ static int iommu_get_page_shift(u32 query_page_size)
*/
for (; i >= 0 ; i--) {
if (query_page_size & (1 << i))
return shift[i];
ret = max(ret, shift[i]);
}
/* No valid page size found. */
return 0;
return ret;
}
static struct property *ddw_property_create(const char *propname, u32 liobn, u64 dma_addr,