Merge branch 'acpi-ec'
* acpi-ec: ACPI: EC: Clean up status flags checks in advance_transaction() ACPI: EC: Untangle error handling in advance_transaction() ACPI: EC: Simplify error handling in advance_transaction() ACPI: EC: Rename acpi_ec_is_gpe_raised() ACPI: EC: Fold acpi_ec_clear_gpe() into its caller ACPI: EC: Eliminate in_interrupt() usage
This commit is contained in:
Rafael J. Wysocki
commit
38a0925c5f
@ -169,7 +169,7 @@ struct acpi_ec_query {
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};
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static int acpi_ec_query(struct acpi_ec *ec, u8 *data);
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static void advance_transaction(struct acpi_ec *ec);
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static void advance_transaction(struct acpi_ec *ec, bool interrupt);
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static void acpi_ec_event_handler(struct work_struct *work);
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static void acpi_ec_event_processor(struct work_struct *work);
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@ -335,12 +335,12 @@ static const char *acpi_ec_cmd_string(u8 cmd)
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* GPE Registers
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* -------------------------------------------------------------------------- */
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static inline bool acpi_ec_is_gpe_raised(struct acpi_ec *ec)
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static inline bool acpi_ec_gpe_status_set(struct acpi_ec *ec)
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{
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acpi_event_status gpe_status = 0;
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(void)acpi_get_gpe_status(NULL, ec->gpe, &gpe_status);
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return (gpe_status & ACPI_EVENT_FLAG_STATUS_SET) ? true : false;
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return !!(gpe_status & ACPI_EVENT_FLAG_STATUS_SET);
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}
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static inline void acpi_ec_enable_gpe(struct acpi_ec *ec, bool open)
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@ -351,14 +351,14 @@ static inline void acpi_ec_enable_gpe(struct acpi_ec *ec, bool open)
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BUG_ON(ec->reference_count < 1);
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acpi_set_gpe(NULL, ec->gpe, ACPI_GPE_ENABLE);
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}
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if (acpi_ec_is_gpe_raised(ec)) {
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if (acpi_ec_gpe_status_set(ec)) {
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/*
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* On some platforms, EN=1 writes cannot trigger GPE. So
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* software need to manually trigger a pseudo GPE event on
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* EN=1 writes.
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*/
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ec_dbg_raw("Polling quirk");
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advance_transaction(ec);
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advance_transaction(ec, false);
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}
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}
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@ -372,23 +372,6 @@ static inline void acpi_ec_disable_gpe(struct acpi_ec *ec, bool close)
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}
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}
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static inline void acpi_ec_clear_gpe(struct acpi_ec *ec)
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{
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/*
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* GPE STS is a W1C register, which means:
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* 1. Software can clear it without worrying about clearing other
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* GPEs' STS bits when the hardware sets them in parallel.
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* 2. As long as software can ensure only clearing it when it is
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* set, hardware won't set it in parallel.
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* So software can clear GPE in any contexts.
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* Warning: do not move the check into advance_transaction() as the
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* EC commands will be sent without GPE raised.
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*/
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if (!acpi_ec_is_gpe_raised(ec))
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return;
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acpi_clear_gpe(NULL, ec->gpe);
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}
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/* --------------------------------------------------------------------------
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* Transaction Management
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* -------------------------------------------------------------------------- */
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@ -488,7 +471,7 @@ static inline void __acpi_ec_enable_event(struct acpi_ec *ec)
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* Unconditionally invoke this once after enabling the event
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* handling mechanism to detect the pending events.
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*/
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advance_transaction(ec);
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advance_transaction(ec, false);
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}
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static inline void __acpi_ec_disable_event(struct acpi_ec *ec)
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@ -632,24 +615,41 @@ static inline void ec_transaction_transition(struct acpi_ec *ec, unsigned long f
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}
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}
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static void advance_transaction(struct acpi_ec *ec)
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static void acpi_ec_spurious_interrupt(struct acpi_ec *ec, struct transaction *t)
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{
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struct transaction *t;
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u8 status;
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bool wakeup = false;
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if (t->irq_count < ec_storm_threshold)
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++t->irq_count;
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/* Trigger if the threshold is 0 too. */
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if (t->irq_count == ec_storm_threshold)
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acpi_ec_mask_events(ec);
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}
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static void advance_transaction(struct acpi_ec *ec, bool interrupt)
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{
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struct transaction *t = ec->curr;
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bool wakeup = false;
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u8 status;
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ec_dbg_stm("%s (%d)", interrupt ? "IRQ" : "TASK", smp_processor_id());
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ec_dbg_stm("%s (%d)", in_interrupt() ? "IRQ" : "TASK",
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smp_processor_id());
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/*
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* By always clearing STS before handling all indications, we can
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* ensure a hardware STS 0->1 change after this clearing can always
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* trigger a GPE interrupt.
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* Clear GPE_STS upfront to allow subsequent hardware GPE_STS 0->1
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* changes to always trigger a GPE interrupt.
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*
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* GPE STS is a W1C register, which means:
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*
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* 1. Software can clear it without worrying about clearing the other
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* GPEs' STS bits when the hardware sets them in parallel.
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*
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* 2. As long as software can ensure only clearing it when it is set,
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* hardware won't set it in parallel.
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*/
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if (ec->gpe >= 0)
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acpi_ec_clear_gpe(ec);
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if (ec->gpe >= 0 && acpi_ec_gpe_status_set(ec))
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acpi_clear_gpe(NULL, ec->gpe);
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status = acpi_ec_read_status(ec);
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t = ec->curr;
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/*
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* Another IRQ or a guarded polling mode advancement is detected,
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* the next QR_EC submission is then allowed.
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@ -661,56 +661,43 @@ static void advance_transaction(struct acpi_ec *ec)
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clear_bit(EC_FLAGS_QUERY_GUARDING, &ec->flags);
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acpi_ec_complete_query(ec);
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}
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if (!t)
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goto out;
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}
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if (!t)
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goto err;
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if (t->flags & ACPI_EC_COMMAND_POLL) {
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if (t->wlen > t->wi) {
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if ((status & ACPI_EC_FLAG_IBF) == 0)
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if (!(status & ACPI_EC_FLAG_IBF))
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acpi_ec_write_data(ec, t->wdata[t->wi++]);
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else
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goto err;
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else if (interrupt && !(status & ACPI_EC_FLAG_SCI))
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acpi_ec_spurious_interrupt(ec, t);
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} else if (t->rlen > t->ri) {
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if ((status & ACPI_EC_FLAG_OBF) == 1) {
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if (status & ACPI_EC_FLAG_OBF) {
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t->rdata[t->ri++] = acpi_ec_read_data(ec);
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if (t->rlen == t->ri) {
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ec_transaction_transition(ec, ACPI_EC_COMMAND_COMPLETE);
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wakeup = true;
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if (t->command == ACPI_EC_COMMAND_QUERY)
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ec_dbg_evt("Command(%s) completed by hardware",
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acpi_ec_cmd_string(ACPI_EC_COMMAND_QUERY));
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wakeup = true;
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}
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} else
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goto err;
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} else if (t->wlen == t->wi &&
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(status & ACPI_EC_FLAG_IBF) == 0) {
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} else if (interrupt && !(status & ACPI_EC_FLAG_SCI)) {
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acpi_ec_spurious_interrupt(ec, t);
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}
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} else if (t->wlen == t->wi && !(status & ACPI_EC_FLAG_IBF)) {
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ec_transaction_transition(ec, ACPI_EC_COMMAND_COMPLETE);
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wakeup = true;
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}
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goto out;
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} else if (!(status & ACPI_EC_FLAG_IBF)) {
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acpi_ec_write_cmd(ec, t->command);
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ec_transaction_transition(ec, ACPI_EC_COMMAND_POLL);
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goto out;
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}
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err:
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/*
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* If SCI bit is set, then don't think it's a false IRQ
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* otherwise will take a not handled IRQ as a false one.
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*/
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if (!(status & ACPI_EC_FLAG_SCI)) {
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if (in_interrupt() && t) {
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if (t->irq_count < ec_storm_threshold)
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++t->irq_count;
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/* Allow triggering on 0 threshold */
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if (t->irq_count == ec_storm_threshold)
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acpi_ec_mask_events(ec);
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}
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}
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out:
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if (status & ACPI_EC_FLAG_SCI)
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acpi_ec_submit_query(ec);
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if (wakeup && in_interrupt())
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if (wakeup && interrupt)
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wake_up(&ec->wait);
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}
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@ -767,7 +754,7 @@ static int ec_poll(struct acpi_ec *ec)
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if (!ec_guard(ec))
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return 0;
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spin_lock_irqsave(&ec->lock, flags);
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advance_transaction(ec);
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advance_transaction(ec, false);
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spin_unlock_irqrestore(&ec->lock, flags);
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} while (time_before(jiffies, delay));
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pr_debug("controller reset, restart transaction\n");
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@ -1216,7 +1203,7 @@ static void acpi_ec_check_event(struct acpi_ec *ec)
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* taking care of it.
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*/
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if (!ec->curr)
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advance_transaction(ec);
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advance_transaction(ec, false);
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spin_unlock_irqrestore(&ec->lock, flags);
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}
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}
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@ -1259,7 +1246,7 @@ static void acpi_ec_handle_interrupt(struct acpi_ec *ec)
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unsigned long flags;
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spin_lock_irqsave(&ec->lock, flags);
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advance_transaction(ec);
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advance_transaction(ec, true);
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spin_unlock_irqrestore(&ec->lock, flags);
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}
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