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net/mlx5: DR, Remove unneeded check from source port builder

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Mask validity for ste builders is checked by mlx5dr_ste_build_pre_check
during matcher creation.
It already checks the mask value of source_vport, so removing
this duplicated check.
Also, moving there the check of source_eswitch_owner_vhca_id mask.

Signed-off-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Yevgeny Kliteynik
2020-08-31 11:56:59 +03:00
committed by Saeed Mahameed
parent 97ffd895fe
commit 38a5c59d7e
3 changed files with 21 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c
View File

@ -252,10 +252,8 @@ static int dr_matcher_set_ste_builders(struct mlx5dr_matcher *matcher,
if (dr_mask_is_gvmi_or_qpn_set(&mask.misc) && if (dr_mask_is_gvmi_or_qpn_set(&mask.misc) &&
(dmn->type == MLX5DR_DOMAIN_TYPE_FDB || (dmn->type == MLX5DR_DOMAIN_TYPE_FDB ||
dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX)) { dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX)) {
ret = mlx5dr_ste_build_src_gvmi_qpn(&sb[idx++], &mask, mlx5dr_ste_build_src_gvmi_qpn(&sb[idx++], &mask,
dmn, inner, rx); dmn, inner, rx);
if (ret)
return ret;
} }
if (dr_mask_is_smac_set(&mask.outer) && if (dr_mask_is_smac_set(&mask.outer) &&

40
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
View File

@ -709,7 +709,14 @@ int mlx5dr_ste_build_pre_check(struct mlx5dr_domain *dmn,
{ {
if (!value && (match_criteria & DR_MATCHER_CRITERIA_MISC)) { if (!value && (match_criteria & DR_MATCHER_CRITERIA_MISC)) {
if (mask->misc.source_port && mask->misc.source_port != 0xffff) { if (mask->misc.source_port && mask->misc.source_port != 0xffff) {
mlx5dr_err(dmn, "Partial mask source_port is not supported\n"); mlx5dr_err(dmn,
"Partial mask source_port is not supported\n");
return -EINVAL;
}
if (mask->misc.source_eswitch_owner_vhca_id &&
mask->misc.source_eswitch_owner_vhca_id != 0xffff) {
mlx5dr_err(dmn,
"Partial mask source_eswitch_owner_vhca_id is not supported\n");
return -EINVAL; return -EINVAL;
} }
} }
@ -2257,25 +2264,14 @@ void mlx5dr_ste_build_register_1(struct mlx5dr_ste_build *sb,
sb->ste_build_tag_func = &dr_ste_build_register_1_tag; sb->ste_build_tag_func = &dr_ste_build_register_1_tag;
} }
static int dr_ste_build_src_gvmi_qpn_bit_mask(struct mlx5dr_match_param *value, static void dr_ste_build_src_gvmi_qpn_bit_mask(struct mlx5dr_match_param *value,
u8 *bit_mask) u8 *bit_mask)
{ {
struct mlx5dr_match_misc *misc_mask = &value->misc; struct mlx5dr_match_misc *misc_mask = &value->misc;
/* Partial misc source_port is not supported */
if (misc_mask->source_port && misc_mask->source_port != 0xffff)
return -EINVAL;
/* Partial misc source_eswitch_owner_vhca_id is not supported */
if (misc_mask->source_eswitch_owner_vhca_id &&
misc_mask->source_eswitch_owner_vhca_id != 0xffff)
return -EINVAL;
DR_STE_SET_MASK(src_gvmi_qp, bit_mask, source_gvmi, misc_mask, source_port); DR_STE_SET_MASK(src_gvmi_qp, bit_mask, source_gvmi, misc_mask, source_port);
DR_STE_SET_MASK(src_gvmi_qp, bit_mask, source_qp, misc_mask, source_sqn); DR_STE_SET_MASK(src_gvmi_qp, bit_mask, source_qp, misc_mask, source_sqn);
misc_mask->source_eswitch_owner_vhca_id = 0; misc_mask->source_eswitch_owner_vhca_id = 0;
return 0;
} }
static int dr_ste_build_src_gvmi_qpn_tag(struct mlx5dr_match_param *value, static int dr_ste_build_src_gvmi_qpn_tag(struct mlx5dr_match_param *value,
@ -2320,19 +2316,15 @@ static int dr_ste_build_src_gvmi_qpn_tag(struct mlx5dr_match_param *value,
return 0; return 0;
} }
int mlx5dr_ste_build_src_gvmi_qpn(struct mlx5dr_ste_build *sb, void mlx5dr_ste_build_src_gvmi_qpn(struct mlx5dr_ste_build *sb,
struct mlx5dr_match_param *mask, struct mlx5dr_match_param *mask,
struct mlx5dr_domain *dmn, struct mlx5dr_domain *dmn,
bool inner, bool rx) bool inner, bool rx)
{ {
int ret;
/* Set vhca_id_valid before we reset source_eswitch_owner_vhca_id */ /* Set vhca_id_valid before we reset source_eswitch_owner_vhca_id */
sb->vhca_id_valid = mask->misc.source_eswitch_owner_vhca_id; sb->vhca_id_valid = mask->misc.source_eswitch_owner_vhca_id;
ret = dr_ste_build_src_gvmi_qpn_bit_mask(mask, sb->bit_mask); dr_ste_build_src_gvmi_qpn_bit_mask(mask, sb->bit_mask);
if (ret)
return ret;
sb->rx = rx; sb->rx = rx;
sb->dmn = dmn; sb->dmn = dmn;
@ -2340,6 +2332,4 @@ int mlx5dr_ste_build_src_gvmi_qpn(struct mlx5dr_ste_build *sb,
sb->lu_type = MLX5DR_STE_LU_TYPE_SRC_GVMI_AND_QP; sb->lu_type = MLX5DR_STE_LU_TYPE_SRC_GVMI_AND_QP;
sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask);
sb->ste_build_tag_func = &dr_ste_build_src_gvmi_qpn_tag; sb->ste_build_tag_func = &dr_ste_build_src_gvmi_qpn_tag;
return 0;
} }

8
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
View File

@ -346,10 +346,10 @@ void mlx5dr_ste_build_register_0(struct mlx5dr_ste_build *sb,
void mlx5dr_ste_build_register_1(struct mlx5dr_ste_build *sb, void mlx5dr_ste_build_register_1(struct mlx5dr_ste_build *sb,
struct mlx5dr_match_param *mask, struct mlx5dr_match_param *mask,
bool inner, bool rx); bool inner, bool rx);
int mlx5dr_ste_build_src_gvmi_qpn(struct mlx5dr_ste_build *sb, void mlx5dr_ste_build_src_gvmi_qpn(struct mlx5dr_ste_build *sb,
struct mlx5dr_match_param *mask, struct mlx5dr_match_param *mask,
struct mlx5dr_domain *dmn, struct mlx5dr_domain *dmn,
bool inner, bool rx); bool inner, bool rx);
void mlx5dr_ste_build_empty_always_hit(struct mlx5dr_ste_build *sb, bool rx); void mlx5dr_ste_build_empty_always_hit(struct mlx5dr_ste_build *sb, bool rx);
/* Actions utils */ /* Actions utils */