Merge branch 'dsa-b53-58xx-fixes'
Florian Fainelli says: ==================== net: dsa: b53: BCM58xx devices fixes This patch series contains fixes for the 58xx devices (Broadcom Northstar Plus), which were identified thanks to the help of Eric Anholt. ==================== Tested-by: Eric Anholt <eric@anholt.net> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
38a98bceaf
@ -326,6 +326,7 @@ static void b53_get_vlan_entry(struct b53_device *dev, u16 vid,
|
|||||||
|
|
||||||
static void b53_set_forwarding(struct b53_device *dev, int enable)
|
static void b53_set_forwarding(struct b53_device *dev, int enable)
|
||||||
{
|
{
|
||||||
|
struct dsa_switch *ds = dev->ds;
|
||||||
u8 mgmt;
|
u8 mgmt;
|
||||||
|
|
||||||
b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
|
b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
|
||||||
@ -336,6 +337,15 @@ static void b53_set_forwarding(struct b53_device *dev, int enable)
|
|||||||
mgmt &= ~SM_SW_FWD_EN;
|
mgmt &= ~SM_SW_FWD_EN;
|
||||||
|
|
||||||
b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
|
b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
|
||||||
|
|
||||||
|
/* Include IMP port in dumb forwarding mode when no tagging protocol is
|
||||||
|
* set
|
||||||
|
*/
|
||||||
|
if (ds->ops->get_tag_protocol(ds) == DSA_TAG_PROTO_NONE) {
|
||||||
|
b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, &mgmt);
|
||||||
|
mgmt |= B53_MII_DUMB_FWDG_EN;
|
||||||
|
b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, mgmt);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void b53_enable_vlan(struct b53_device *dev, bool enable)
|
static void b53_enable_vlan(struct b53_device *dev, bool enable)
|
||||||
@ -598,7 +608,8 @@ static void b53_switch_reset_gpio(struct b53_device *dev)
|
|||||||
|
|
||||||
static int b53_switch_reset(struct b53_device *dev)
|
static int b53_switch_reset(struct b53_device *dev)
|
||||||
{
|
{
|
||||||
u8 mgmt;
|
unsigned int timeout = 1000;
|
||||||
|
u8 mgmt, reg;
|
||||||
|
|
||||||
b53_switch_reset_gpio(dev);
|
b53_switch_reset_gpio(dev);
|
||||||
|
|
||||||
@ -607,6 +618,28 @@ static int b53_switch_reset(struct b53_device *dev)
|
|||||||
b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x00);
|
b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x00);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* This is specific to 58xx devices here, do not use is58xx() which
|
||||||
|
* covers the larger Starfigther 2 family, including 7445/7278 which
|
||||||
|
* still use this driver as a library and need to perform the reset
|
||||||
|
* earlier.
|
||||||
|
*/
|
||||||
|
if (dev->chip_id == BCM58XX_DEVICE_ID) {
|
||||||
|
b53_read8(dev, B53_CTRL_PAGE, B53_SOFTRESET, ®);
|
||||||
|
reg |= SW_RST | EN_SW_RST | EN_CH_RST;
|
||||||
|
b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, reg);
|
||||||
|
|
||||||
|
do {
|
||||||
|
b53_read8(dev, B53_CTRL_PAGE, B53_SOFTRESET, ®);
|
||||||
|
if (!(reg & SW_RST))
|
||||||
|
break;
|
||||||
|
|
||||||
|
usleep_range(1000, 2000);
|
||||||
|
} while (timeout-- > 0);
|
||||||
|
|
||||||
|
if (timeout == 0)
|
||||||
|
return -ETIMEDOUT;
|
||||||
|
}
|
||||||
|
|
||||||
b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
|
b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
|
||||||
|
|
||||||
if (!(mgmt & SM_SW_FWD_EN)) {
|
if (!(mgmt & SM_SW_FWD_EN)) {
|
||||||
@ -1731,7 +1764,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
|
|||||||
.vlans = 4096,
|
.vlans = 4096,
|
||||||
.enabled_ports = 0x1ff,
|
.enabled_ports = 0x1ff,
|
||||||
.arl_entries = 4,
|
.arl_entries = 4,
|
||||||
.cpu_port = B53_CPU_PORT_25,
|
.cpu_port = B53_CPU_PORT,
|
||||||
.vta_regs = B53_VTA_REGS,
|
.vta_regs = B53_VTA_REGS,
|
||||||
.duplex_reg = B53_DUPLEX_STAT_GE,
|
.duplex_reg = B53_DUPLEX_STAT_GE,
|
||||||
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
|
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
|
||||||
|
@ -104,6 +104,10 @@
|
|||||||
#define B53_UC_FWD_EN BIT(6)
|
#define B53_UC_FWD_EN BIT(6)
|
||||||
#define B53_MC_FWD_EN BIT(7)
|
#define B53_MC_FWD_EN BIT(7)
|
||||||
|
|
||||||
|
/* Switch control (8 bit) */
|
||||||
|
#define B53_SWITCH_CTRL 0x22
|
||||||
|
#define B53_MII_DUMB_FWDG_EN BIT(6)
|
||||||
|
|
||||||
/* (16 bit) */
|
/* (16 bit) */
|
||||||
#define B53_UC_FLOOD_MASK 0x32
|
#define B53_UC_FLOOD_MASK 0x32
|
||||||
#define B53_MC_FLOOD_MASK 0x34
|
#define B53_MC_FLOOD_MASK 0x34
|
||||||
@ -139,6 +143,7 @@
|
|||||||
/* Software reset register (8 bit) */
|
/* Software reset register (8 bit) */
|
||||||
#define B53_SOFTRESET 0x79
|
#define B53_SOFTRESET 0x79
|
||||||
#define SW_RST BIT(7)
|
#define SW_RST BIT(7)
|
||||||
|
#define EN_CH_RST BIT(6)
|
||||||
#define EN_SW_RST BIT(4)
|
#define EN_SW_RST BIT(4)
|
||||||
|
|
||||||
/* Fast Aging Control register (8 bit) */
|
/* Fast Aging Control register (8 bit) */
|
||||||
|
Loading…
x
Reference in New Issue
Block a user