mtd: fsl-quadspi: Access multiple chips simultaneously
Add supports for simultaneous access to multiple chips. Need to lock the mutex before any quad spi operations and unlock the mutex after operations complete. Signed-off-by: Han Xu <b45815@freescale.com> [Brian: reworked err path in fsl_qspi_prep()] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This commit is contained in:
@@ -26,6 +26,7 @@
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/spi-nor.h>
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#include <linux/mtd/spi-nor.h>
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#include <linux/mutex.h>
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/* The registers */
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/* The registers */
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#define QUADSPI_MCR 0x00
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#define QUADSPI_MCR 0x00
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@@ -233,6 +234,7 @@ struct fsl_qspi {
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u32 clk_rate;
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u32 clk_rate;
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unsigned int chip_base_addr; /* We may support two chips. */
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unsigned int chip_base_addr; /* We may support two chips. */
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bool has_second_chip;
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bool has_second_chip;
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struct mutex lock;
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};
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};
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static inline int is_vybrid_qspi(struct fsl_qspi *q)
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static inline int is_vybrid_qspi(struct fsl_qspi *q)
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@@ -761,18 +763,24 @@ static int fsl_qspi_prep(struct spi_nor *nor, enum spi_nor_ops ops)
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struct fsl_qspi *q = nor->priv;
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struct fsl_qspi *q = nor->priv;
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int ret;
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int ret;
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mutex_lock(&q->lock);
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ret = clk_enable(q->clk_en);
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ret = clk_enable(q->clk_en);
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if (ret)
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if (ret)
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return ret;
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goto err_mutex;
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ret = clk_enable(q->clk);
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ret = clk_enable(q->clk);
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if (ret) {
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if (ret)
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clk_disable(q->clk_en);
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goto err_clk;
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return ret;
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}
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fsl_qspi_set_base_addr(q, nor);
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fsl_qspi_set_base_addr(q, nor);
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return 0;
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return 0;
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err_clk:
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clk_disable(q->clk_en);
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err_mutex:
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mutex_unlock(&q->lock);
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return ret;
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}
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}
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static void fsl_qspi_unprep(struct spi_nor *nor, enum spi_nor_ops ops)
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static void fsl_qspi_unprep(struct spi_nor *nor, enum spi_nor_ops ops)
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@@ -781,6 +789,7 @@ static void fsl_qspi_unprep(struct spi_nor *nor, enum spi_nor_ops ops)
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clk_disable(q->clk);
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clk_disable(q->clk);
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clk_disable(q->clk_en);
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clk_disable(q->clk_en);
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mutex_unlock(&q->lock);
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}
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}
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static int fsl_qspi_probe(struct platform_device *pdev)
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static int fsl_qspi_probe(struct platform_device *pdev)
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@@ -864,6 +873,8 @@ static int fsl_qspi_probe(struct platform_device *pdev)
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if (of_get_property(np, "fsl,qspi-has-second-chip", NULL))
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if (of_get_property(np, "fsl,qspi-has-second-chip", NULL))
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q->has_second_chip = true;
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q->has_second_chip = true;
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mutex_init(&q->lock);
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/* iterate the subnodes. */
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/* iterate the subnodes. */
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for_each_available_child_of_node(dev->of_node, np) {
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for_each_available_child_of_node(dev->of_node, np) {
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char modalias[40];
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char modalias[40];
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@@ -892,24 +903,24 @@ static int fsl_qspi_probe(struct platform_device *pdev)
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ret = of_modalias_node(np, modalias, sizeof(modalias));
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ret = of_modalias_node(np, modalias, sizeof(modalias));
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if (ret < 0)
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if (ret < 0)
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goto irq_failed;
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goto mutex_failed;
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ret = of_property_read_u32(np, "spi-max-frequency",
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ret = of_property_read_u32(np, "spi-max-frequency",
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&q->clk_rate);
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&q->clk_rate);
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if (ret < 0)
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if (ret < 0)
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goto irq_failed;
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goto mutex_failed;
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/* set the chip address for READID */
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/* set the chip address for READID */
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fsl_qspi_set_base_addr(q, nor);
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fsl_qspi_set_base_addr(q, nor);
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ret = spi_nor_scan(nor, modalias, SPI_NOR_QUAD);
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ret = spi_nor_scan(nor, modalias, SPI_NOR_QUAD);
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if (ret)
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if (ret)
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goto irq_failed;
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goto mutex_failed;
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ppdata.of_node = np;
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ppdata.of_node = np;
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ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
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ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
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if (ret)
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if (ret)
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goto irq_failed;
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goto mutex_failed;
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/* Set the correct NOR size now. */
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/* Set the correct NOR size now. */
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if (q->nor_size == 0) {
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if (q->nor_size == 0) {
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@@ -950,6 +961,8 @@ last_init_failed:
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i *= 2;
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i *= 2;
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mtd_device_unregister(&q->mtd[i]);
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mtd_device_unregister(&q->mtd[i]);
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}
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}
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mutex_failed:
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mutex_destroy(&q->lock);
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irq_failed:
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irq_failed:
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clk_disable_unprepare(q->clk);
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clk_disable_unprepare(q->clk);
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clk_failed:
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clk_failed:
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@@ -973,6 +986,7 @@ static int fsl_qspi_remove(struct platform_device *pdev)
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writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);
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writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);
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writel(0x0, q->iobase + QUADSPI_RSER);
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writel(0x0, q->iobase + QUADSPI_RSER);
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mutex_destroy(&q->lock);
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clk_unprepare(q->clk);
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clk_unprepare(q->clk);
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clk_unprepare(q->clk_en);
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clk_unprepare(q->clk_en);
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return 0;
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return 0;
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