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net/mlx5: Fix typo in comments

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Fix typo:
*vectores  ==> vectors
*realeased  ==> released
*erros  ==> errors
*namepsace  ==> namespace
*trafic  ==> traffic
*proccessed  ==> processed
*retore  ==> restore
*Currenlty  ==> Currently
*crated  ==> created
*chane  ==> change
*cannnot  ==> cannot
*usuallly  ==> usually
*failes  ==> fails
*importent  ==> important
*reenabled  ==> re-enabled
*alocation  ==> allocation
*recived  ==> received
*tanslation  ==> translation

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Cai Huoqing
2021-07-30 11:03:00 +08:00
committed by Saeed Mahameed
parent 88be326349
commit 39c538d644
16 changed files with 19 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c
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@ -520,7 +520,7 @@ int mlx5e_tc_tun_create_header_ipv6(struct mlx5e_priv *priv,
e->out_dev = attr.out_dev; e->out_dev = attr.out_dev;
e->route_dev_ifindex = attr.route_dev->ifindex; e->route_dev_ifindex = attr.route_dev->ifindex;
/* It's importent to add the neigh to the hash table before checking /* It's important to add the neigh to the hash table before checking
* the neigh validity state. So if we'll get a notification, in case the * the neigh validity state. So if we'll get a notification, in case the
* neigh changes it's validity state, we would find the relevant neigh * neigh changes it's validity state, we would find the relevant neigh
* in the hash. * in the hash.

2
drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c
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@ -126,7 +126,7 @@ int mlx5e_open_xsk(struct mlx5e_priv *priv, struct mlx5e_params *params,
/* Create a separate SQ, so that when the buff pool is disabled, we could /* Create a separate SQ, so that when the buff pool is disabled, we could
* close this SQ safely and stop receiving CQEs. In other case, e.g., if * close this SQ safely and stop receiving CQEs. In other case, e.g., if
* the XDPSQ was used instead, we might run into trouble when the buff pool * the XDPSQ was used instead, we might run into trouble when the buff pool
* is disabled and then reenabled, but the SQ continues receiving CQEs * is disabled and then re-enabled, but the SQ continues receiving CQEs
* from the old buff pool. * from the old buff pool.
*/ */
err = mlx5e_open_xdpsq(c, params, &cparam->xdp_sq, pool, &c->xsksq, true); err = mlx5e_open_xdpsq(c, params, &cparam->xdp_sq, pool, &c->xsksq, true);

2
drivers/net/ethernet/mellanox/mlx5/core/en_common.c
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@ -33,7 +33,7 @@
#include "en.h" #include "en.h"
/* mlx5e global resources should be placed in this file. /* mlx5e global resources should be placed in this file.
* Global resources are common to all the netdevices crated on the same nic. * Global resources are common to all the netdevices created on the same nic.
*/ */
void mlx5e_mkey_set_relaxed_ordering(struct mlx5_core_dev *mdev, void *mkc) void mlx5e_mkey_set_relaxed_ordering(struct mlx5_core_dev *mdev, void *mkc)

2
drivers/net/ethernet/mellanox/mlx5/core/en_rep.h
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@ -146,7 +146,7 @@ struct mlx5e_neigh_hash_entry {
*/ */
refcount_t refcnt; refcount_t refcnt;
/* Save the last reported time offloaded trafic pass over one of the /* Save the last reported time offloaded traffic pass over one of the
* neigh hash entry flows. Use it to periodically update the neigh * neigh hash entry flows. Use it to periodically update the neigh
* 'used' value and avoid neigh deleting by the kernel. * 'used' value and avoid neigh deleting by the kernel.
*/ */

4
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
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@ -97,7 +97,7 @@ struct mlx5e_tc_attr_to_reg_mapping mlx5e_tc_attr_to_reg_mappings[] = {
[MARK_TO_REG] = mark_to_reg_ct, [MARK_TO_REG] = mark_to_reg_ct,
[LABELS_TO_REG] = labels_to_reg_ct, [LABELS_TO_REG] = labels_to_reg_ct,
[FTEID_TO_REG] = fteid_to_reg_ct, [FTEID_TO_REG] = fteid_to_reg_ct,
/* For NIC rules we store the retore metadata directly /* For NIC rules we store the restore metadata directly
* into reg_b that is passed to SW since we don't * into reg_b that is passed to SW since we don't
* jump between steering domains. * jump between steering domains.
*/ */
@ -2448,7 +2448,7 @@ static int __parse_cls_flower(struct mlx5e_priv *priv,
spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_3; spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_3;
} }
} }
/* Currenlty supported only for MPLS over UDP */ /* Currently supported only for MPLS over UDP */
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_MPLS) && if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_MPLS) &&
!netif_is_bareudp(filter_dev)) { !netif_is_bareudp(filter_dev)) {
NL_SET_ERR_MSG_MOD(extack, NL_SET_ERR_MSG_MOD(extack,

2
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
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@ -1492,7 +1492,7 @@ abort:
/** /**
* mlx5_eswitch_enable - Enable eswitch * mlx5_eswitch_enable - Enable eswitch
* @esw: Pointer to eswitch * @esw: Pointer to eswitch
* @num_vfs: Enable eswitch swich for given number of VFs. * @num_vfs: Enable eswitch switch for given number of VFs.
* Caller must pass num_vfs > 0 when enabling eswitch for * Caller must pass num_vfs > 0 when enabling eswitch for
* vf vports. * vf vports.
* mlx5_eswitch_enable() returns 0 on success or error code on failure. * mlx5_eswitch_enable() returns 0 on success or error code on failure.

2
drivers/net/ethernet/mellanox/mlx5/core/events.c
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@ -27,7 +27,7 @@ static int pcie_core(struct notifier_block *, unsigned long, void *);
static int forward_event(struct notifier_block *, unsigned long, void *); static int forward_event(struct notifier_block *, unsigned long, void *);
static struct mlx5_nb events_nbs_ref[] = { static struct mlx5_nb events_nbs_ref[] = {
/* Events to be proccessed by mlx5_core */ /* Events to be processed by mlx5_core */
{.nb.notifier_call = any_notifier, .event_type = MLX5_EVENT_TYPE_NOTIFY_ANY }, {.nb.notifier_call = any_notifier, .event_type = MLX5_EVENT_TYPE_NOTIFY_ANY },
{.nb.notifier_call = temp_warn, .event_type = MLX5_EVENT_TYPE_TEMP_WARN_EVENT }, {.nb.notifier_call = temp_warn, .event_type = MLX5_EVENT_TYPE_TEMP_WARN_EVENT },
{.nb.notifier_call = port_module, .event_type = MLX5_EVENT_TYPE_PORT_MODULE_EVENT }, {.nb.notifier_call = port_module, .event_type = MLX5_EVENT_TYPE_PORT_MODULE_EVENT },

2
drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c
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@ -1516,7 +1516,7 @@ static int mlx5_fpga_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
mutex_lock(&fpga_xfrm->lock); mutex_lock(&fpga_xfrm->lock);
if (!fpga_xfrm->sa_ctx) if (!fpga_xfrm->sa_ctx)
/* Unbounded xfrm, chane only sw attrs */ /* Unbounded xfrm, change only sw attrs */
goto change_sw_xfrm_attrs; goto change_sw_xfrm_attrs;
/* copy original hw sa */ /* copy original hw sa */

2
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
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@ -2493,7 +2493,7 @@ static void set_prio_attrs_in_prio(struct fs_prio *prio, int acc_level)
acc_level_ns = set_prio_attrs_in_ns(ns, acc_level); acc_level_ns = set_prio_attrs_in_ns(ns, acc_level);
/* If this a prio with chains, and we can jump from one chain /* If this a prio with chains, and we can jump from one chain
* (namepsace) to another, so we accumulate the levels * (namespace) to another, so we accumulate the levels
*/ */
if (prio->node.type == FS_TYPE_PRIO_CHAINS) if (prio->node.type == FS_TYPE_PRIO_CHAINS)
acc_level = acc_level_ns; acc_level = acc_level_ns;

2
drivers/net/ethernet/mellanox/mlx5/core/health.c
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@ -170,7 +170,7 @@ static bool reset_fw_if_needed(struct mlx5_core_dev *dev)
/* The reset only needs to be issued by one PF. The health buffer is /* The reset only needs to be issued by one PF. The health buffer is
* shared between all functions, and will be cleared during a reset. * shared between all functions, and will be cleared during a reset.
* Check again to avoid a redundant 2nd reset. If the fatal erros was * Check again to avoid a redundant 2nd reset. If the fatal errors was
* PCI related a reset won't help. * PCI related a reset won't help.
*/ */
fatal_error = mlx5_health_check_fatal_sensors(dev); fatal_error = mlx5_health_check_fatal_sensors(dev);

2
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
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@ -749,7 +749,7 @@ static int mlx5_pps_event(struct notifier_block *nb,
} else { } else {
ptp_event.type = PTP_CLOCK_EXTTS; ptp_event.type = PTP_CLOCK_EXTTS;
} }
/* TODOL clock->ptp can be NULL if ptp_clock_register failes */ /* TODOL clock->ptp can be NULL if ptp_clock_register fails */
ptp_clock_event(clock->ptp, &ptp_event); ptp_clock_event(clock->ptp, &ptp_event);
break; break;
case PTP_PF_PEROUT: case PTP_PF_PEROUT:

2
drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.c
View File

@ -40,7 +40,7 @@
struct mlx5_vxlan { struct mlx5_vxlan {
struct mlx5_core_dev *mdev; struct mlx5_core_dev *mdev;
/* max_num_ports is usuallly 4, 16 buckets is more than enough */ /* max_num_ports is usually 4, 16 buckets is more than enough */
DECLARE_HASHTABLE(htable, 4); DECLARE_HASHTABLE(htable, 4);
struct mutex sync_lock; /* sync add/del port HW operations */ struct mutex sync_lock; /* sync add/del port HW operations */
}; };

4
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
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@ -18,7 +18,7 @@
#define MLX5_SFS_PER_CTRL_IRQ 64 #define MLX5_SFS_PER_CTRL_IRQ 64
#define MLX5_IRQ_CTRL_SF_MAX 8 #define MLX5_IRQ_CTRL_SF_MAX 8
/* min num of vectores for SFs to be enabled */ /* min num of vectors for SFs to be enabled */
#define MLX5_IRQ_VEC_COMP_BASE_SF 2 #define MLX5_IRQ_VEC_COMP_BASE_SF 2
#define MLX5_EQ_SHARE_IRQ_MAX_COMP (8) #define MLX5_EQ_SHARE_IRQ_MAX_COMP (8)
@ -597,7 +597,7 @@ void mlx5_irq_table_destroy(struct mlx5_core_dev *dev)
return; return;
/* There are cases where IRQs still will be in used when we reaching /* There are cases where IRQs still will be in used when we reaching
* to here. Hence, making sure all the irqs are realeased. * to here. Hence, making sure all the irqs are released.
*/ */
irq_pools_destroy(table); irq_pools_destroy(table);
pci_free_irq_vectors(dev->pdev); pci_free_irq_vectors(dev->pdev);

2
drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c
View File

@ -476,7 +476,7 @@ static void mlx5_sf_table_disable(struct mlx5_sf_table *table)
return; return;
/* Balances with refcount_set; drop the reference so that new user cmd cannot start /* Balances with refcount_set; drop the reference so that new user cmd cannot start
* and new vhca event handler cannnot run. * and new vhca event handler cannot run.
*/ */
mlx5_sf_table_put(table); mlx5_sf_table_put(table);
wait_for_completion(&table->disable_complete); wait_for_completion(&table->disable_complete);

2
include/linux/mlx5/device.h
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@ -1038,7 +1038,7 @@ enum {
struct mlx5_mkey_seg { struct mlx5_mkey_seg {
/* This is a two bit field occupying bits 31-30. /* This is a two bit field occupying bits 31-30.
* bit 31 is always 0, * bit 31 is always 0,
* bit 30 is zero for regular MRs and 1 (e.g free) for UMRs that do not have tanslation * bit 30 is zero for regular MRs and 1 (e.g free) for UMRs that do not have translation
*/ */
u8 status; u8 status;
u8 pcie_control; u8 pcie_control;

4
include/linux/mlx5/driver.h
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@ -581,7 +581,7 @@ struct mlx5_priv {
/* end: qp staff */ /* end: qp staff */
/* start: alloc staff */ /* start: alloc staff */
/* protect buffer alocation according to numa node */ /* protect buffer allocation according to numa node */
struct mutex alloc_mutex; struct mutex alloc_mutex;
int numa_node; int numa_node;
@ -1111,7 +1111,7 @@ static inline u8 mlx5_mkey_variant(u32 mkey)
} }
/* Async-atomic event notifier used by mlx5 core to forward FW /* Async-atomic event notifier used by mlx5 core to forward FW
* evetns recived from event queue to mlx5 consumers. * evetns received from event queue to mlx5 consumers.
* Optimise event queue dipatching. * Optimise event queue dipatching.
*/ */
int mlx5_notifier_register(struct mlx5_core_dev *dev, struct notifier_block *nb); int mlx5_notifier_register(struct mlx5_core_dev *dev, struct notifier_block *nb);