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iommu/vt-d: Fix off-by-one in PASID allocation

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PASID allocator uses IDR which is exclusive for the end of the
allocation range. There is no need to decrement pasid_max.

Fixes: af39507305 ("iommu/vt-d: Apply global PASID in SVA")
Reported-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Jacob Pan 2020-01-02 08:18:07 +08:00 committed by Joerg Roedel
parent d62efd4fa6
commit 39d630e332
1 changed files with 1 additions and 1 deletions
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2
drivers/iommu/intel-svm.c
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@ -334,7 +334,7 @@ int intel_svm_bind_mm(struct device *dev, int *pasid, int flags, struct svm_dev_
/* Do not use PASID 0 in caching mode (virtualised IOMMU) */
ret = intel_pasid_alloc_id(svm,
!!cap_caching_mode(iommu->cap),
pasid_max - 1, GFP_KERNEL);
pasid_max, GFP_KERNEL);
if (ret < 0) {
kfree(svm);
kfree(sdev);