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PCI: mobiveil: Collect the interrupt related operations into a function

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Collect the interrupt initialization related operations into
a new function to make code more readable.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk>
This commit is contained in:
Hou Zhiqiang 2020-02-13 12:06:34 +08:00 committed by Lorenzo Pieralisi
parent 2ba24842d6
commit 39e3a03eea
1 changed files with 42 additions and 23 deletions
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65
drivers/pci/controller/pcie-mobiveil.c
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@ -454,12 +454,6 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie)
return PTR_ERR(pcie->csr_axi_slave_base);
pcie->pcie_reg_base = res->start;
/* map MSI config resource */
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "apb_csr");
pcie->apb_csr_base = devm_pci_remap_cfg_resource(dev, res);
if (IS_ERR(pcie->apb_csr_base))
return PTR_ERR(pcie->apb_csr_base);
/* read the number of windows requested */
if (of_property_read_u32(node, "apio-wins", &pcie->apio_wins))
pcie->apio_wins = MAX_PIO_WINDOWS;
@ -467,12 +461,6 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie)
if (of_property_read_u32(node, "ppio-wins", &pcie->ppio_wins))
pcie->ppio_wins = MAX_PIO_WINDOWS;
rp->irq = platform_get_irq(pdev, 0);
if (rp->irq <= 0) {
dev_err(dev, "failed to map IRQ: %d\n", rp->irq);
return -ENODEV;
}
return 0;
}
@ -618,9 +606,6 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
pab_ctrl |= (1 << AMBA_PIO_ENABLE_SHIFT) | (1 << PEX_PIO_ENABLE_SHIFT);
mobiveil_csr_writel(pcie, pab_ctrl, PAB_CTRL);
mobiveil_csr_writel(pcie, (PAB_INTP_INTX_MASK | PAB_INTP_MSI_MASK),
PAB_INTP_AMBA_MISC_ENB);
/*
* program PIO Enable Bit to 1 and Config Window Enable Bit to 1 in
* PAB_AXI_PIO_CTRL Register
@ -670,9 +655,6 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
value |= (PCI_CLASS_BRIDGE_PCI << 16);
mobiveil_csr_writel(pcie, value, PAB_INTP_AXI_PIO_CLASS);
/* setup MSI hardware registers */
mobiveil_pcie_enable_msi(pcie);
return 0;
}
@ -873,6 +855,46 @@ static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie)
return 0;
}
static int mobiveil_pcie_interrupt_init(struct mobiveil_pcie *pcie)
{
struct platform_device *pdev = pcie->pdev;
struct device *dev = &pdev->dev;
struct mobiveil_root_port *rp = &pcie->rp;
struct resource *res;
int ret;
/* map MSI config resource */
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "apb_csr");
pcie->apb_csr_base = devm_pci_remap_cfg_resource(dev, res);
if (IS_ERR(pcie->apb_csr_base))
return PTR_ERR(pcie->apb_csr_base);
/* setup MSI hardware registers */
mobiveil_pcie_enable_msi(pcie);
rp->irq = platform_get_irq(pdev, 0);
if (rp->irq <= 0) {
dev_err(dev, "failed to map IRQ: %d\n", rp->irq);
return -ENODEV;
}
/* initialize the IRQ domains */
ret = mobiveil_pcie_init_irq_domain(pcie);
if (ret) {
dev_err(dev, "Failed creating IRQ Domain\n");
return ret;
}
irq_set_chained_handler_and_data(rp->irq, mobiveil_pcie_isr, pcie);
/* Enable interrupts */
mobiveil_csr_writel(pcie, (PAB_INTP_INTX_MASK | PAB_INTP_MSI_MASK),
PAB_INTP_AMBA_MISC_ENB);
return 0;
}
static int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie)
{
struct mobiveil_root_port *rp = &pcie->rp;
@ -906,15 +928,12 @@ static int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie)
return ret;
}
/* initialize the IRQ domains */
ret = mobiveil_pcie_init_irq_domain(pcie);
ret = mobiveil_pcie_interrupt_init(pcie);
if (ret) {
dev_err(dev, "Failed creating IRQ Domain\n");
dev_err(dev, "Interrupt init failed\n");
return ret;
}
irq_set_chained_handler_and_data(rp->irq, mobiveil_pcie_isr, pcie);
/* Initialize bridge */
bridge->dev.parent = dev;
bridge->sysdata = pcie;