iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

drm/amd/display: Optimize clocks on clock change

Browse Source 
[WHY]
Presently, there is no way for clocks to be lowered, only raised.

[HOW]
Compare clock status against previous known clock status, and optimize
if different.
This requires re-ordering the layout of the dc_clocks structure, as the
current ordering allows identical clock states to appear different.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wesley Chalmers 2019-08-30 14:59:00 -04:00 committed by Alex Deucher
parent 2fef0faa1c
commit 3a4d180d4a
2 changed files with 7 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/drm/amd/display/dc/core/dc.c
View File

@ -1646,6 +1646,9 @@ enum surface_update_type dc_check_update_surfaces_for_stream(
updates[i].surface->update_flags.raw = 0xFFFFFFFF;
}
if (type == UPDATE_TYPE_FAST && memcmp(&dc->current_state->bw_ctx.bw.dcn.clk, &dc->clk_mgr->clks, offsetof(struct dc_clocks, prev_p_state_change_support)) != 0)
dc->optimized_required = true;
return type;
}

8
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -252,11 +252,7 @@ enum wm_report_mode {
*/
struct dc_clocks {
int dispclk_khz;
int max_supported_dppclk_khz;
int max_supported_dispclk_khz;
int dppclk_khz;
int bw_dppclk_khz; /*a copy of dppclk_khz*/
int bw_dispclk_khz;
int dcfclk_khz;
int socclk_khz;
int dcfclk_deep_sleep_khz;
@ -270,6 +266,10 @@ struct dc_clocks {
* optimization required
*/
bool prev_p_state_change_support;
int max_supported_dppclk_khz;
int max_supported_dispclk_khz;
int bw_dppclk_khz; /*a copy of dppclk_khz*/
int bw_dispclk_khz;
};
struct dc_bw_validation_profile {