ARM: dts: samsung: s5pv210: correct onenand size-cells
Children of NAND controllers have only chip select, so address without the size. Correct size-cells as reported by dtbs_check: s5pv210-galaxys.dtb: onenand@b0600000: #size-cells:0:0: 0 was expected Link: https://lore.kernel.org/r/20240313191148.21792-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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@ -82,7 +82,7 @@
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clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
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clock-names = "bus", "onenand";
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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