ARM: dts: samsung: s5pv210: correct onenand size-cells

Children of NAND controllers have only chip select, so address without
the size.  Correct size-cells as reported by dtbs_check:

  s5pv210-galaxys.dtb: onenand@b0600000: #size-cells:0:0: 0 was expected

Link: https://lore.kernel.org/r/20240313191148.21792-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Krzysztof Kozlowski 2024-03-13 20:11:48 +01:00
parent e8b41d201f
commit 3a64e95e1a

View File

@ -82,7 +82,7 @@
clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
clock-names = "bus", "onenand";
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
status = "disabled";
};