mvebu fixes for 5.9 (part 1)
- Allow to use correct MAC address for particular DSA slaves / ethernet ports on Espressobin (Armada 3720) - Remove incorrect check in ll_get_coherency_base() used for Armada 370/XP SoCs. -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCX2xajwAKCRALBhiOFHI7 1cKHAJ9khAJBG4R+XruEFqqAkZTap/sUvgCeN/65h/cPTil9lH+4k9dES6l1yv8= =aoib -----END PGP SIGNATURE----- Merge tag 'mvebu-fixes-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/fixes mvebu fixes for 5.9 (part 1) - Allow to use correct MAC address for particular DSA slaves / ethernet ports on Espressobin (Armada 3720) - Remove incorrect check in ll_get_coherency_base() used for Armada 370/XP SoCs. * tag 'mvebu-fixes-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: ARM: mvebu: drop pointless check for coherency_base arm64: dts: marvell: espressobin: Add ethernet switch aliases Link: https://lore.kernel.org/r/87y2kkesj5.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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commit
3a69e4e606
@ -35,13 +35,8 @@ ENTRY(ll_get_coherency_base)
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/*
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* MMU is disabled, use the physical address of the coherency
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* base address. However, if the coherency fabric isn't mapped
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* (i.e its virtual address is zero), it means coherency is
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* not enabled, so we return 0.
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* base address, (or 0x0 if the coherency fabric is not mapped)
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*/
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ldr r1, =coherency_base
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cmp r1, #0
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beq 2f
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adr r1, 3f
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ldr r3, [r1]
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ldr r1, [r1, r3]
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@ -20,17 +20,23 @@
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compatible = "globalscale,espressobin-v7-emmc", "globalscale,espressobin-v7",
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"globalscale,espressobin", "marvell,armada3720",
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"marvell,armada3710";
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aliases {
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/* ethernet1 is wan port */
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ethernet1 = &switch0port3;
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ethernet3 = &switch0port1;
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};
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};
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&switch0 {
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ports {
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port@1 {
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switch0port1: port@1 {
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reg = <1>;
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label = "lan1";
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phy-handle = <&switch0phy0>;
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};
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port@3 {
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switch0port3: port@3 {
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reg = <3>;
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label = "wan";
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phy-handle = <&switch0phy2>;
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@ -19,17 +19,23 @@
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model = "Globalscale Marvell ESPRESSOBin Board V7";
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compatible = "globalscale,espressobin-v7", "globalscale,espressobin",
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"marvell,armada3720", "marvell,armada3710";
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aliases {
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/* ethernet1 is wan port */
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ethernet1 = &switch0port3;
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ethernet3 = &switch0port1;
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};
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};
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&switch0 {
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ports {
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port@1 {
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switch0port1: port@1 {
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reg = <1>;
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label = "lan1";
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phy-handle = <&switch0phy0>;
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};
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port@3 {
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switch0port3: port@3 {
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reg = <3>;
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label = "wan";
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phy-handle = <&switch0phy2>;
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@ -13,6 +13,10 @@
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/ {
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aliases {
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ethernet0 = ð0;
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/* for dsa slave device */
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ethernet1 = &switch0port1;
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ethernet2 = &switch0port2;
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ethernet3 = &switch0port3;
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serial0 = &uart0;
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serial1 = &uart1;
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};
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@ -120,7 +124,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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switch0port0: port@0 {
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reg = <0>;
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label = "cpu";
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ethernet = <ð0>;
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@ -131,19 +135,19 @@
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};
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};
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port@1 {
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switch0port1: port@1 {
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reg = <1>;
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label = "wan";
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phy-handle = <&switch0phy0>;
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};
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port@2 {
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switch0port2: port@2 {
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reg = <2>;
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label = "lan0";
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phy-handle = <&switch0phy1>;
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};
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port@3 {
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switch0port3: port@3 {
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reg = <3>;
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label = "lan1";
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phy-handle = <&switch0phy2>;
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