phy: phy-rockchip-inno-usb2: add rk3588 support
Add basic support for the USB2 PHY found in the Rockchip RK3588. Co-developed-by: William Wu <william.wu@rock-chips.com> Signed-off-by: William Wu <william.wu@rock-chips.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230522170324.61349-3-sebastian.reichel@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Sebastian Reichel
Vinod Koul
parent
cb240921ec
commit
3a7db8e9ed
@ -116,6 +116,12 @@ struct rockchip_chg_det_reg {
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* @bvalid_det_en: vbus valid rise detection enable register.
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* @bvalid_det_st: vbus valid rise detection status register.
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* @bvalid_det_clr: vbus valid rise detection clear register.
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* @disfall_en: host disconnect fall edge detection enable.
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* @disfall_st: host disconnect fall edge detection state.
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* @disfall_clr: host disconnect fall edge detection clear.
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* @disrise_en: host disconnect rise edge detection enable.
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* @disrise_st: host disconnect rise edge detection state.
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* @disrise_clr: host disconnect rise edge detection clear.
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* @id_det_en: id detection enable register.
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* @id_det_st: id detection state register.
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* @id_det_clr: id detection clear register.
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@ -133,6 +139,12 @@ struct rockchip_usb2phy_port_cfg {
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struct usb2phy_reg bvalid_det_en;
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struct usb2phy_reg bvalid_det_st;
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struct usb2phy_reg bvalid_det_clr;
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struct usb2phy_reg disfall_en;
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struct usb2phy_reg disfall_st;
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struct usb2phy_reg disfall_clr;
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struct usb2phy_reg disrise_en;
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struct usb2phy_reg disrise_st;
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struct usb2phy_reg disrise_clr;
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struct usb2phy_reg id_det_en;
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struct usb2phy_reg id_det_st;
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struct usb2phy_reg id_det_clr;
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@ -168,6 +180,7 @@ struct rockchip_usb2phy_cfg {
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* @port_id: flag for otg port or host port.
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* @suspended: phy suspended flag.
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* @vbus_attached: otg device vbus status.
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* @host_disconnect: usb host disconnect status.
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* @bvalid_irq: IRQ number assigned for vbus valid rise detection.
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* @id_irq: IRQ number assigned for ID pin detection.
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* @ls_irq: IRQ number assigned for linestate detection.
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@ -187,6 +200,7 @@ struct rockchip_usb2phy_port {
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unsigned int port_id;
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bool suspended;
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bool vbus_attached;
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bool host_disconnect;
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int bvalid_irq;
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int id_irq;
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int ls_irq;
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@ -405,6 +419,27 @@ static int rockchip_usb2phy_extcon_register(struct rockchip_usb2phy *rphy)
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return 0;
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}
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static int rockchip_usb2phy_enable_host_disc_irq(struct rockchip_usb2phy *rphy,
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struct rockchip_usb2phy_port *rport,
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bool en)
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{
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int ret;
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ret = property_enable(rphy->grf, &rport->port_cfg->disfall_clr, true);
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if (ret)
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return ret;
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ret = property_enable(rphy->grf, &rport->port_cfg->disfall_en, en);
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if (ret)
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return ret;
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ret = property_enable(rphy->grf, &rport->port_cfg->disrise_clr, true);
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if (ret)
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return ret;
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return property_enable(rphy->grf, &rport->port_cfg->disrise_en, en);
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}
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static int rockchip_usb2phy_init(struct phy *phy)
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{
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struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
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@ -449,6 +484,15 @@ static int rockchip_usb2phy_init(struct phy *phy)
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dev_dbg(&rport->phy->dev, "mode %d\n", rport->mode);
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}
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} else if (rport->port_id == USB2PHY_PORT_HOST) {
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if (rport->port_cfg->disfall_en.offset) {
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rport->host_disconnect = true;
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ret = rockchip_usb2phy_enable_host_disc_irq(rphy, rport, true);
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if (ret) {
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dev_err(rphy->dev, "failed to enable disconnect irq\n");
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goto out;
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}
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}
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/* clear linestate and enable linestate detect irq */
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ret = property_enable(rphy->grf,
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&rport->port_cfg->ls_det_clr, true);
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@ -810,9 +854,7 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work)
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struct rockchip_usb2phy_port *rport =
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container_of(work, struct rockchip_usb2phy_port, sm_work.work);
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struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
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unsigned int sh = rport->port_cfg->utmi_hstdet.bitend -
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rport->port_cfg->utmi_hstdet.bitstart + 1;
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unsigned int ul, uhd, state;
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unsigned int sh, ul, uhd, state;
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unsigned int ul_mask, uhd_mask;
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int ret;
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@ -822,18 +864,26 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work)
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if (ret < 0)
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goto next_schedule;
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ret = regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset, &uhd);
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if (ret < 0)
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goto next_schedule;
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uhd_mask = GENMASK(rport->port_cfg->utmi_hstdet.bitend,
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rport->port_cfg->utmi_hstdet.bitstart);
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ul_mask = GENMASK(rport->port_cfg->utmi_ls.bitend,
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rport->port_cfg->utmi_ls.bitstart);
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/* stitch on utmi_ls and utmi_hstdet as phy state */
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state = ((uhd & uhd_mask) >> rport->port_cfg->utmi_hstdet.bitstart) |
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(((ul & ul_mask) >> rport->port_cfg->utmi_ls.bitstart) << sh);
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if (rport->port_cfg->utmi_hstdet.offset) {
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ret = regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset, &uhd);
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if (ret < 0)
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goto next_schedule;
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uhd_mask = GENMASK(rport->port_cfg->utmi_hstdet.bitend,
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rport->port_cfg->utmi_hstdet.bitstart);
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sh = rport->port_cfg->utmi_hstdet.bitend -
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rport->port_cfg->utmi_hstdet.bitstart + 1;
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/* stitch on utmi_ls and utmi_hstdet as phy state */
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state = ((uhd & uhd_mask) >> rport->port_cfg->utmi_hstdet.bitstart) |
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(((ul & ul_mask) >> rport->port_cfg->utmi_ls.bitstart) << sh);
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} else {
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state = ((ul & ul_mask) >> rport->port_cfg->utmi_ls.bitstart) << 1 |
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rport->host_disconnect;
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}
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switch (state) {
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case PHY_STATE_HS_ONLINE:
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@ -966,6 +1016,31 @@ static irqreturn_t rockchip_usb2phy_otg_mux_irq(int irq, void *data)
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return ret;
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}
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static irqreturn_t rockchip_usb2phy_host_disc_irq(int irq, void *data)
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{
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struct rockchip_usb2phy_port *rport = data;
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struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
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if (!property_enabled(rphy->grf, &rport->port_cfg->disfall_st) &&
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!property_enabled(rphy->grf, &rport->port_cfg->disrise_st))
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return IRQ_NONE;
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mutex_lock(&rport->mutex);
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/* clear disconnect fall or rise detect irq pending status */
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if (property_enabled(rphy->grf, &rport->port_cfg->disfall_st)) {
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property_enable(rphy->grf, &rport->port_cfg->disfall_clr, true);
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rport->host_disconnect = false;
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} else if (property_enabled(rphy->grf, &rport->port_cfg->disrise_st)) {
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property_enable(rphy->grf, &rport->port_cfg->disrise_clr, true);
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rport->host_disconnect = true;
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}
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mutex_unlock(&rport->mutex);
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return IRQ_HANDLED;
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}
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static irqreturn_t rockchip_usb2phy_irq(int irq, void *data)
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{
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struct rockchip_usb2phy *rphy = data;
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@ -978,6 +1053,10 @@ static irqreturn_t rockchip_usb2phy_irq(int irq, void *data)
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if (!rport->phy)
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continue;
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if (rport->port_id == USB2PHY_PORT_HOST &&
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rport->port_cfg->disfall_en.offset)
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ret |= rockchip_usb2phy_host_disc_irq(irq, rport);
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switch (rport->port_id) {
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case USB2PHY_PORT_OTG:
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if (rport->mode != USB_DR_MODE_HOST &&
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@ -1233,7 +1312,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
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}
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/* support address_cells=2 */
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if (reg == 0) {
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if (of_property_count_u32_elems(np, "reg") > 2 && reg == 0) {
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if (of_property_read_u32_index(np, "reg", 1, ®)) {
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dev_err(dev, "the reg property is not assigned in %pOFn node\n",
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np);
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@ -1254,14 +1333,14 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
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/* find out a proper config which can be matched with dt. */
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index = 0;
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while (phy_cfgs[index].reg) {
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do {
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if (phy_cfgs[index].reg == reg) {
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rphy->phy_cfg = &phy_cfgs[index];
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break;
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}
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++index;
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}
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} while (phy_cfgs[index].reg);
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if (!rphy->phy_cfg) {
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dev_err(dev, "no phy-config can be matched with %pOFn node\n",
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@ -1664,6 +1743,122 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
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{ /* sentinel */ }
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};
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static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
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{
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.reg = 0x0000,
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.num_ports = 1,
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.clkout_ctl = { 0x0000, 0, 0, 1, 0 },
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.port_cfgs = {
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[USB2PHY_PORT_OTG] = {
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.phy_sus = { 0x000c, 11, 11, 0, 1 },
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.bvalid_det_en = { 0x0080, 1, 1, 0, 1 },
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.bvalid_det_st = { 0x0084, 1, 1, 0, 1 },
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.bvalid_det_clr = { 0x0088, 1, 1, 0, 1 },
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.ls_det_en = { 0x0080, 0, 0, 0, 1 },
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.ls_det_st = { 0x0084, 0, 0, 0, 1 },
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.ls_det_clr = { 0x0088, 0, 0, 0, 1 },
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.disfall_en = { 0x0080, 6, 6, 0, 1 },
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.disfall_st = { 0x0084, 6, 6, 0, 1 },
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.disfall_clr = { 0x0088, 6, 6, 0, 1 },
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.disrise_en = { 0x0080, 5, 5, 0, 1 },
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.disrise_st = { 0x0084, 5, 5, 0, 1 },
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.disrise_clr = { 0x0088, 5, 5, 0, 1 },
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.utmi_avalid = { 0x00c0, 7, 7, 0, 1 },
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.utmi_bvalid = { 0x00c0, 6, 6, 0, 1 },
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.utmi_ls = { 0x00c0, 10, 9, 0, 1 },
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}
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},
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.chg_det = {
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.cp_det = { 0x00c0, 0, 0, 0, 1 },
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.dcp_det = { 0x00c0, 0, 0, 0, 1 },
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.dp_det = { 0x00c0, 1, 1, 1, 0 },
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.idm_sink_en = { 0x0008, 5, 5, 1, 0 },
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.idp_sink_en = { 0x0008, 5, 5, 0, 1 },
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.idp_src_en = { 0x0008, 14, 14, 0, 1 },
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.rdm_pdwn_en = { 0x0008, 14, 14, 0, 1 },
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.vdm_src_en = { 0x0008, 7, 6, 0, 3 },
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.vdp_src_en = { 0x0008, 7, 6, 0, 3 },
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},
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},
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{
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.reg = 0x4000,
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.num_ports = 1,
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.clkout_ctl = { 0x0000, 0, 0, 1, 0 },
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.port_cfgs = {
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[USB2PHY_PORT_OTG] = {
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.phy_sus = { 0x000c, 11, 11, 0, 1 },
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.bvalid_det_en = { 0x0080, 1, 1, 0, 1 },
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.bvalid_det_st = { 0x0084, 1, 1, 0, 1 },
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.bvalid_det_clr = { 0x0088, 1, 1, 0, 1 },
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.ls_det_en = { 0x0080, 0, 0, 0, 1 },
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.ls_det_st = { 0x0084, 0, 0, 0, 1 },
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.ls_det_clr = { 0x0088, 0, 0, 0, 1 },
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.disfall_en = { 0x0080, 6, 6, 0, 1 },
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.disfall_st = { 0x0084, 6, 6, 0, 1 },
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.disfall_clr = { 0x0088, 6, 6, 0, 1 },
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.disrise_en = { 0x0080, 5, 5, 0, 1 },
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.disrise_st = { 0x0084, 5, 5, 0, 1 },
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.disrise_clr = { 0x0088, 5, 5, 0, 1 },
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.utmi_avalid = { 0x00c0, 7, 7, 0, 1 },
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.utmi_bvalid = { 0x00c0, 6, 6, 0, 1 },
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.utmi_ls = { 0x00c0, 10, 9, 0, 1 },
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}
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},
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.chg_det = {
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.cp_det = { 0x00c0, 0, 0, 0, 1 },
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.dcp_det = { 0x00c0, 0, 0, 0, 1 },
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.dp_det = { 0x00c0, 1, 1, 1, 0 },
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.idm_sink_en = { 0x0008, 5, 5, 1, 0 },
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.idp_sink_en = { 0x0008, 5, 5, 0, 1 },
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.idp_src_en = { 0x0008, 14, 14, 0, 1 },
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.rdm_pdwn_en = { 0x0008, 14, 14, 0, 1 },
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.vdm_src_en = { 0x0008, 7, 6, 0, 3 },
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.vdp_src_en = { 0x0008, 7, 6, 0, 3 },
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},
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},
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{
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.reg = 0x8000,
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.num_ports = 1,
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.clkout_ctl = { 0x0000, 0, 0, 1, 0 },
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.port_cfgs = {
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[USB2PHY_PORT_HOST] = {
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.phy_sus = { 0x0008, 2, 2, 0, 1 },
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.ls_det_en = { 0x0080, 0, 0, 0, 1 },
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.ls_det_st = { 0x0084, 0, 0, 0, 1 },
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.ls_det_clr = { 0x0088, 0, 0, 0, 1 },
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.disfall_en = { 0x0080, 6, 6, 0, 1 },
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.disfall_st = { 0x0084, 6, 6, 0, 1 },
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.disfall_clr = { 0x0088, 6, 6, 0, 1 },
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.disrise_en = { 0x0080, 5, 5, 0, 1 },
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.disrise_st = { 0x0084, 5, 5, 0, 1 },
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.disrise_clr = { 0x0088, 5, 5, 0, 1 },
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.utmi_ls = { 0x00c0, 10, 9, 0, 1 },
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}
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},
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},
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{
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.reg = 0xc000,
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.num_ports = 1,
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.clkout_ctl = { 0x0000, 0, 0, 1, 0 },
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.port_cfgs = {
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[USB2PHY_PORT_HOST] = {
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.phy_sus = { 0x0008, 2, 2, 0, 1 },
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.ls_det_en = { 0x0080, 0, 0, 0, 1 },
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.ls_det_st = { 0x0084, 0, 0, 0, 1 },
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.ls_det_clr = { 0x0088, 0, 0, 0, 1 },
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.disfall_en = { 0x0080, 6, 6, 0, 1 },
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.disfall_st = { 0x0084, 6, 6, 0, 1 },
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.disfall_clr = { 0x0088, 6, 6, 0, 1 },
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.disrise_en = { 0x0080, 5, 5, 0, 1 },
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.disrise_st = { 0x0084, 5, 5, 0, 1 },
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.disrise_clr = { 0x0088, 5, 5, 0, 1 },
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.utmi_ls = { 0x00c0, 10, 9, 0, 1 },
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}
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},
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},
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{ /* sentinel */ }
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};
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static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
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{
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.reg = 0x100,
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@ -1714,6 +1909,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
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{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
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{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
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{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
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{ .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
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{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
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{}
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};
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