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arm64: dts: r8a7796: Remove unit-address and reg from integrated cache

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[ Upstream commit 57a4fd420c6e8a04b6a87ff24d34250cd7c48f15 ]

The Cortex-A57 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: 1561f20760ec96db ("arm64: dts: r8a7796: Add Renesas R8A7796 SoC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Geert Uytterhoeven 2017-03-03 14:18:17 +01:00 committed by Greg Kroah-Hartman
parent b54a9bb7ef
commit 3aa10f5387
1 changed files with 1 additions and 2 deletions
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arch/arm64/boot/dts/renesas/r8a7796.dtsi
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@ -36,9 +36,8 @@
enable-method = "psci";
};
L2_CA57: cache-controller@0 {
L2_CA57: cache-controller-0 {
compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7796_PD_CA57_SCU>;
cache-unified;
cache-level = <2>;