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dt-bindings for Google GS101 clock controllers for v6.9

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The Devicetree binding headers for Samsung Exynos and Google GS101 clock
 controllers, used by the Samsung clock controller drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmXDomAQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD15RVD/47GXcMhrlxZ6dR+r2Ym6sBzpkGl44Qz4b6
 i+N/7mXVqpOAnNvxMd3i/0ZjOZJR4HO2xKmUJ2IGSZlNDmF57e+Uagd0Wf4NCr24
 V87R1Fu96hIKkHpSbPZB9jDv03YLPK/qw8k/zfEE88Dbgkzp3B+aL+XiK49hiESs
 /lFIxMwcGgpGLJq7SPADSmRF9eeZQ6S90rZblMJT0i6zXT/m3hWw4cwxPLVuNktH
 YBJuhwYA1ZQ+/vLif0PIN9NvgTmTS/NbLznE2HrKZZs2Uc7zwCiw0zeLB82OhMLM
 meSEc2qoGBEpZrrZWUn3jSIEcjcagLHpzLgZ8D6OWuYaLOyfBN3lz3S3mO5BEJOi
 eBClaSGu6KGo6gNUh4X4X5Ja5G00rlc+zvC9OuOmXTsM//1njwJaeb34REwjvaWq
 meOgmr4xKFfVJS8k324xWE5ieADNfPxbcL7855oz6JVMti3KG9SkpFr6o1OObAGm
 jlvuZV0hMiRXHxSUkjsluHVLTVm5AVLaBwTD1abwLoq/xpy0m68Ib9fl2/3CcrQp
 U7fKOCW7/aDbnq3bg++xxlhX/iyx7R0RBRRVetnqPvqtln7FyNiLvKV0nG08D0da
 8F7p0DHfwIY15vAXV+YFqDFfOHtUyXdorcly2i7ezFsKFxjOVxGwg+0DZINUFuJp
 ONoXM/q7Qg==
 =TjPm
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt-bindings-clk-6.9-3' into next/clk

dt-bindings for Google GS101 clock controllers for v6.9

The Devicetree binding headers for Samsung Exynos and Google GS101 clock
controllers, used by the Samsung clock controller drivers.
This commit is contained in:
Krzysztof Kozlowski 2024-02-07 16:32:51 +01:00
commit 3ab1d817c3
2 changed files with 54 additions and 3 deletions
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9
Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
View File

@ -31,6 +31,7 @@ properties:
- google,gs101-cmu-apm
- google,gs101-cmu-misc
- google,gs101-cmu-peric0
- google,gs101-cmu-peric1
clocks:
minItems: 1
@ -93,15 +94,17 @@ allOf:
properties:
compatible:
contains:
const: google,gs101-cmu-peric0
enum:
- google,gs101-cmu-peric0
- google,gs101-cmu-peric1
then:
properties:
clocks:
items:
- description: External reference clock (24.576 MHz)
- description: Connectivity Peripheral 0 bus clock (from CMU_TOP)
- description: Connectivity Peripheral 0 IP clock (from CMU_TOP)
- description: Connectivity Peripheral 0/1 bus clock (from CMU_TOP)
- description: Connectivity Peripheral 0/1 IP clock (from CMU_TOP)
clock-names:
items:

48
include/dt-bindings/clock/google,gs101.h
View File

@ -470,4 +470,52 @@
#define CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK 78
#define CLK_GOUT_PERIC0_SYSREG_PERIC0_PCLK 79
/* CMU_PERIC1 */
#define CLK_MOUT_PERIC1_BUS_USER 1
#define CLK_MOUT_PERIC1_I3C_USER 2
#define CLK_MOUT_PERIC1_USI0_USI_USER 3
#define CLK_MOUT_PERIC1_USI10_USI_USER 4
#define CLK_MOUT_PERIC1_USI11_USI_USER 5
#define CLK_MOUT_PERIC1_USI12_USI_USER 6
#define CLK_MOUT_PERIC1_USI13_USI_USER 7
#define CLK_MOUT_PERIC1_USI9_USI_USER 8
#define CLK_DOUT_PERIC1_I3C 9
#define CLK_DOUT_PERIC1_USI0_USI 10
#define CLK_DOUT_PERIC1_USI10_USI 11
#define CLK_DOUT_PERIC1_USI11_USI 12
#define CLK_DOUT_PERIC1_USI12_USI 13
#define CLK_DOUT_PERIC1_USI13_USI 14
#define CLK_DOUT_PERIC1_USI9_USI 15
#define CLK_GOUT_PERIC1_IP 16
#define CLK_GOUT_PERIC1_PCLK 17
#define CLK_GOUT_PERIC1_CLK_PERIC1_I3C_CLK 18
#define CLK_GOUT_PERIC1_CLK_PERIC1_OSCCLK_CLK 19
#define CLK_GOUT_PERIC1_D_TZPC_PERIC1_PCLK 20
#define CLK_GOUT_PERIC1_GPC_PERIC1_PCLK 21
#define CLK_GOUT_PERIC1_GPIO_PERIC1_PCLK 22
#define CLK_GOUT_PERIC1_LHM_AXI_P_PERIC1_I_CLK 23
#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1 24
#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2 25
#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3 26
#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4 27
#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5 28
#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6 29
#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_8 30
#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1 31
#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_15 32
#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2 33
#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3 34
#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4 35
#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5 36
#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6 37
#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_8 38
#define CLK_GOUT_PERIC1_CLK_PERIC1_BUSP_CLK 39
#define CLK_GOUT_PERIC1_CLK_PERIC1_USI0_USI_CLK 40
#define CLK_GOUT_PERIC1_CLK_PERIC1_USI10_USI_CLK 41
#define CLK_GOUT_PERIC1_CLK_PERIC1_USI11_USI_CLK 42
#define CLK_GOUT_PERIC1_CLK_PERIC1_USI12_USI_CLK 43
#define CLK_GOUT_PERIC1_CLK_PERIC1_USI13_USI_CLK 44
#define CLK_GOUT_PERIC1_CLK_PERIC1_USI9_USI_CLK 45
#define CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK 46
#endif /* _DT_BINDINGS_CLOCK_GOOGLE_GS101_H */