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RISC-V: KVM: Remove 's' & 'u' as valid ISA extension

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There are no ISA extension defined as 's' & 'u' in RISC-V specifications.
The misa register defines 's' & 'u' bit as Supervisor/User privilege mode
enabled. But it should not appear in the ISA extension in the device tree.

Remove those from the allowed ISA extension for kvm.

Fixes: a33c72faf2d7 ("RISC-V: KVM: Implement VCPU create, init and
destroy functions")
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Atish Patra 2022-04-19 18:32:57 -07:00 committed by Anup Patel
parent b2d229d4dd
commit 3ab75a793e
1 changed files with 1 additions and 3 deletions
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4
arch/riscv/kvm/vcpu.c
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@ -43,9 +43,7 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
riscv_isa_extension_mask(d) | \
riscv_isa_extension_mask(f) | \
riscv_isa_extension_mask(i) | \
riscv_isa_extension_mask(m) | \
riscv_isa_extension_mask(s) | \
riscv_isa_extension_mask(u))
riscv_isa_extension_mask(m))
static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
{