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tree-wide: Assorted spelling fixes

Browse Source 
In particular, several occurances of funny versions of 'success',
'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address',
'beginning', 'desirable', 'separate' and 'necessary' are fixed.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Joe Perches <joe@perches.com>
Cc: Junio C Hamano <gitster@pobox.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
This commit is contained in:
Daniel Mack 2010-02-03 08:01:28 +08:00 committed by Jiri Kosina
parent 1537a3638c
commit 3ad2f3fbb9
141 changed files with 192 additions and 192 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/DocBook/mtdnand.tmpl
View File

@ -488,7 +488,7 @@ static void board_select_chip (struct mtd_info *mtd, int chip)
The ECC bytes must be placed immidiately after the data
bytes in order to make the syndrome generator work. This
is contrary to the usual layout used by software ECC. The
seperation of data and out of band area is not longer
separation of data and out of band area is not longer
possible. The nand driver code handles this layout and
the remaining free bytes in the oob area are managed by
the autoplacement code. Provide a matching oob-layout
@ -560,7 +560,7 @@ static void board_select_chip (struct mtd_info *mtd, int chip)
bad blocks. They have factory marked good blocks. The marker pattern
is erased when the block is erased to be reused. So in case of
powerloss before writing the pattern back to the chip this block
would be lost and added to the bad blocks. Therefor we scan the
would be lost and added to the bad blocks. Therefore we scan the
chip(s) when we detect them the first time for good blocks and
store this information in a bad block table before erasing any
of the blocks.
@ -1094,7 +1094,7 @@ in this page</entry>
manufacturers specifications. This applies similar to the spare area.
</para>
<para>
Therefor NAND aware filesystems must either write in page size chunks
Therefore NAND aware filesystems must either write in page size chunks
or hold a writebuffer to collect smaller writes until they sum up to
pagesize. Available NAND aware filesystems: JFFS2, YAFFS.
</para>

2
Documentation/DocBook/v4l/common.xml
View File

@ -1170,7 +1170,7 @@ frames per second. If less than this number of frames is to be
captured or output, applications can request frame skipping or
duplicating on the driver side. This is especially useful when using
the &func-read; or &func-write;, which are not augmented by timestamps
or sequence counters, and to avoid unneccessary data copying.</para>
or sequence counters, and to avoid unnecessary data copying.</para>
<para>Finally these ioctls can be used to determine the number of
buffers used internally by a driver in read/write mode. For

2
Documentation/DocBook/v4l/vidioc-g-parm.xml
View File

@ -55,7 +55,7 @@ captured or output, applications can request frame skipping or
duplicating on the driver side. This is especially useful when using
the <function>read()</function> or <function>write()</function>, which
are not augmented by timestamps or sequence counters, and to avoid
unneccessary data copying.</para>
unnecessary data copying.</para>
<para>Further these ioctls can be used to determine the number of
buffers used internally by a driver in read/write mode. For

4
Documentation/arm/Samsung-S3C24XX/CPUfreq.txt
View File

@ -14,8 +14,8 @@ Introduction
how the clocks are arranged. The first implementation used as single
PLL to feed the ARM, memory and peripherals via a series of dividers
and muxes and this is the implementation that is documented here. A
newer version where there is a seperate PLL and clock divider for the
ARM core is available as a seperate driver.
newer version where there is a separate PLL and clock divider for the
ARM core is available as a separate driver.
Layout

2
Documentation/hwmon/abituguru
View File

@ -30,7 +30,7 @@ Supported chips:
bank1_types=1,1,0,0,0,0,0,2,0,0,0,0,2,0,0,1
You may also need to specify the fan_sensors option for these boards
fan_sensors=5
2) There is a seperate abituguru3 driver for these motherboards,
2) There is a separate abituguru3 driver for these motherboards,
the abituguru (without the 3 !) driver will not work on these
motherboards (and visa versa)!

2
Documentation/input/rotary-encoder.txt
View File

@ -75,7 +75,7 @@ and the number of steps or will clamp at the maximum and zero depending on
the configuration.
Because GPIO to IRQ mapping is platform specific, this information must
be given in seperately to the driver. See the example below.
be given in separately to the driver. See the example below.
---------<snip>---------

2
Documentation/networking/skfp.txt
View File

@ -68,7 +68,7 @@ Compaq adapters (not tested):
=======================
From v2.01 on, the driver is integrated in the linux kernel sources.
Therefor, the installation is the same as for any other adapter
Therefore, the installation is the same as for any other adapter
supported by the kernel.
Refer to the manual of your distribution about the installation
of network adapters.

2
Documentation/s390/kvm.txt
View File

@ -102,7 +102,7 @@ args: unsigned long
see also: include/linux/kvm.h
This ioctl stores the state of the cpu at the guest real address given as
argument, unless one of the following values defined in include/linux/kvm.h
is given as arguement:
is given as argument:
KVM_S390_STORE_STATUS_NOADDR - the CPU stores its status to the save area in
absolute lowcore as defined by the principles of operation
KVM_S390_STORE_STATUS_PREFIXED - the CPU stores its status to the save area in

10
Documentation/scsi/ChangeLog.lpfc
View File

@ -989,8 +989,8 @@ Changes from 20040709 to 20040716
* Remove redundant port_cmp != 2 check in if
(!port_cmp) { .... if (port_cmp != 2).... }
* Clock changes: removed struct clk_data and timerList.
* Clock changes: seperate nodev_tmo and els_retry_delay into 2
seperate timers and convert to 1 argument changed
* Clock changes: separate nodev_tmo and els_retry_delay into 2
separate timers and convert to 1 argument changed
LPFC_NODE_FARP_PEND_t to struct lpfc_node_farp_pend convert
ipfarp_tmo to 1 argument convert target struct tmofunc and
rtplunfunc to 1 argument * cr_count, cr_delay and
@ -1514,7 +1514,7 @@ Changes from 20040402 to 20040409
* Remove unused elxclock declaration in elx_sli.h.
* Since everywhere IOCB_ENTRY is used, the return value is cast,
move the cast into the macro.
* Split ioctls out into seperate files
* Split ioctls out into separate files
Changes from 20040326 to 20040402
@ -1534,7 +1534,7 @@ Changes from 20040326 to 20040402
* Unused variable cleanup
* Use Linux list macros for DMABUF_t
* Break up ioctls into 3 sections, dfc, util, hbaapi
rearranged code so this could be easily seperated into a
rearranged code so this could be easily separated into a
differnet module later All 3 are currently turned on by
defines in lpfc_ioctl.c LPFC_DFC_IOCTL, LPFC_UTIL_IOCTL,
LPFC_HBAAPI_IOCTL
@ -1551,7 +1551,7 @@ Changes from 20040326 to 20040402
started by lpfc_online(). lpfc_offline() only stopped
els_timeout routine. It now stops all timeout routines
associated with that hba.
* Replace seperate next and prev pointers in struct
* Replace separate next and prev pointers in struct
lpfc_bindlist with list_head type. In elxHBA_t, replace
fc_nlpbind_start and _end with fc_nlpbind_list and use
list_head macros to access it.

2
Documentation/trace/ftrace.txt
View File

@ -1588,7 +1588,7 @@ module author does not need to worry about it.
When tracing is enabled, kstop_machine is called to prevent
races with the CPUS executing code being modified (which can
cause the CPU to do undesireable things), and the nops are
cause the CPU to do undesirable things), and the nops are
patched back to calls. But this time, they do not call mcount
(which is just a function stub). They now call into the ftrace
infrastructure.

2
arch/arm/mach-ep93xx/micro9.c
View File

@ -28,7 +28,7 @@
*
* Micro9-High has up to 64MB of 32-bit flash on CS1
* Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1
* Micro9-Lite uses a seperate MTD map driver for flash support
* Micro9-Lite uses a separate MTD map driver for flash support
* Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
*************************************************************************/
static struct physmap_flash_data micro9_flash_data;

2
arch/arm/mach-nomadik/board-nhk8815.c
View File

@ -38,7 +38,7 @@
#define SRC_CR_INIT_MASK 0x00007fff
#define SRC_CR_INIT_VAL 0x2aaa8000
/* These adresses span 16MB, so use three individual pages */
/* These addresses span 16MB, so use three individual pages */
static struct resource nhk8815_nand_resources[] = {
{
.name = "nand_addr",

4
arch/arm/mach-u300/core.c
View File

@ -356,7 +356,7 @@ static struct resource ave_resources[] = {
/*
* The AVE3e requires two regions of 256MB that it considers
* "invisible". The hardware will not be able to access these
* adresses, so they should never point to system RAM.
* addresses, so they should never point to system RAM.
*/
{
.name = "AVE3e Reserved 0",
@ -571,7 +571,7 @@ static void __init u300_init_check_chip(void)
/*
* Some devices and their resources require reserved physical memory from
* the end of the available RAM. This function traverses the list of devices
* and assigns actual adresses to these.
* and assigns actual addresses to these.
*/
static void __init u300_assign_physmem(void)
{

2
arch/arm/mach-u300/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
#include <mach/hardware.h>
.macro addruart,rx
/* If we move the adress using MMU, use this. */
/* If we move the address using MMU, use this. */
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
ldreq \rx, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address

2
arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h
View File

@ -78,7 +78,7 @@ extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
* others = Special functions (dependant on bank)
*
* Note, since the code to deal with the case where there are two control
* registers instead of one, we do not have a seperate set of functions for
* registers instead of one, we do not have a separate set of functions for
* each case.
*/
extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,

2
arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h
View File

@ -12,7 +12,7 @@
* published by the Free Software Foundation.
*/
/* Note, this is a seperate header file as some of the clock framework
/* Note, this is a separate header file as some of the clock framework
* needs to touch this if the clk_48m is used as the USB OHCI or other
* peripheral source.
*/

2
arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
View File

@ -135,7 +135,7 @@ struct s3c_cpufreq_config {
* @locktime_m: The lock-time in uS for the MPLL.
* @locktime_u: The lock-time in uS for the UPLL.
* @locttime_bits: The number of bits each LOCKTIME field.
* @need_pll: Set if this driver needs to change the PLL values to acheive
* @need_pll: Set if this driver needs to change the PLL values to achieve
* any frequency changes. This is really only need by devices like the
* S3C2410 where there is no or limited divider between the PLL and the
* ARMCLK.

2
arch/cris/arch-v10/lib/old_checksum.c
View File

@ -77,7 +77,7 @@ __wsum csum_partial(const void *p, int len, __wsum __sum)
sum += *buff++;
if (endMarker > buff)
sum += *(const u8 *)buff; /* add extra byte seperately */
sum += *(const u8 *)buff; /* add extra byte separately */
BITOFF;
return (__force __wsum)sum;

2
arch/cris/arch-v32/mm/tlb.c
View File

@ -189,7 +189,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
spin_unlock(&mmu_context_lock);
/*
* Remember the pgd for the fault handlers. Keep a seperate
* Remember the pgd for the fault handlers. Keep a separate
* copy of it because current and active_mm might be invalid
* at points where * there's still a need to derefer the pgd.
*/

2
arch/h8300/include/asm/io.h
View File

@ -25,7 +25,7 @@
* memory location directly.
*/
/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
* two accesses to memory, which may be undesireable for some devices.
* two accesses to memory, which may be undesirable for some devices.
*/
/*

2
arch/ia64/sn/kernel/setup.c
View File

@ -241,7 +241,7 @@ static void __cpuinit sn_check_for_wars(void)
* Note: This stuff is duped here because Altix requires the PCDP to
* locate a usable VGA device due to lack of proper ACPI support. Structures
* could be used from drivers/firmware/pcdp.h, but it was decided that moving
* this file to a more public location just for Altix use was undesireable.
* this file to a more public location just for Altix use was undesirable.
*/
struct hcdp_uart_desc {

2
arch/m68k/atari/atakeyb.c
View File

@ -121,7 +121,7 @@ KEYBOARD_STATE kb_state;
* bytes have been lost and in which state of the packet structure we are now.
* This usually causes keyboards bytes to be interpreted as mouse movements
* and vice versa, which is very annoying. It seems better to throw away some
* bytes (that are usually mouse bytes) than to misinterpret them. Therefor I
* bytes (that are usually mouse bytes) than to misinterpret them. Therefore I
* introduced the RESYNC state for IKBD data. In this state, the bytes up to
* one that really looks like a key event (0x04..0xf2) or the start of a mouse
* packet (0xf8..0xfb) are thrown away, but at most 2 bytes. This at least

2
arch/m68k/include/asm/io_no.h
View File

@ -16,7 +16,7 @@
* memory location directly.
*/
/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
* two accesses to memory, which may be undesireable for some devices.
* two accesses to memory, which may be undesirable for some devices.
*/
/*

2
arch/powerpc/boot/dts/kmeter1.dts
View File

@ -490,7 +490,7 @@
compatible = "cfi-flash";
/*
* The Intel P30 chip has 2 non-identical chips on
* one die, so we need to define 2 seperate regions
* one die, so we need to define 2 separate regions
* that are scanned by physmap_of independantly.
*/
reg = <0 0x00000000 0x02000000

2
arch/s390/include/asm/cio.h
View File

@ -20,7 +20,7 @@
/**
* struct ccw1 - channel command word
* @cmd_code: command code
* @flags: flags, like IDA adressing, etc.
* @flags: flags, like IDA addressing, etc.
* @count: byte count
* @cda: data address
*

2
arch/s390/kernel/sclp.S
View File

@ -221,7 +221,7 @@ _sclp_print:
lh %r9,0(%r8) # update sccb length
ar %r9,%r6
sth %r9,0(%r8)
ar %r7,%r6 # update current mto adress
ar %r7,%r6 # update current mto address
ltr %r0,%r0 # more characters?
jnz .LinitmtoS4
l %r2,.LwritedataS4-.LbaseS4(%r13)# write data

2
arch/sparc/kernel/leon_kernel.c
View File

@ -124,7 +124,7 @@ void __init leon_init_timers(irq_handler_t counter_fn)
if (!(LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config) &
(1<<LEON3_GPTIMER_SEPIRQ))) {
prom_printf("irq timer not configured with seperate irqs \n");
prom_printf("irq timer not configured with separate irqs \n");
BUG();
}

2
arch/sparc/kernel/perf_event.c
View File

@ -1353,7 +1353,7 @@ static void perf_callchain_user_32(struct pt_regs *regs,
}
/* Like powerpc we can't get PMU interrupts within the PMU handler,
* so no need for seperate NMI and IRQ chains as on x86.
* so no need for separate NMI and IRQ chains as on x86.
*/
static DEFINE_PER_CPU(struct perf_callchain_entry, callchain);

10
arch/x86/crypto/twofish-i586-asm_32.S
View File

@ -22,7 +22,7 @@
#include <asm/asm-offsets.h>
/* return adress at 0 */
/* return address at 0 */
#define in_blk 12 /* input byte array address parameter*/
#define out_blk 8 /* output byte array address parameter*/
@ -230,8 +230,8 @@ twofish_enc_blk:
push %edi
mov tfm + 16(%esp), %ebp /* abuse the base pointer: set new base bointer to the crypto tfm */
add $crypto_tfm_ctx_offset, %ebp /* ctx adress */
mov in_blk+16(%esp),%edi /* input adress in edi */
add $crypto_tfm_ctx_offset, %ebp /* ctx address */
mov in_blk+16(%esp),%edi /* input address in edi */
mov (%edi), %eax
mov b_offset(%edi), %ebx
@ -286,8 +286,8 @@ twofish_dec_blk:
mov tfm + 16(%esp), %ebp /* abuse the base pointer: set new base bointer to the crypto tfm */
add $crypto_tfm_ctx_offset, %ebp /* ctx adress */
mov in_blk+16(%esp),%edi /* input adress in edi */
add $crypto_tfm_ctx_offset, %ebp /* ctx address */
mov in_blk+16(%esp),%edi /* input address in edi */
mov (%edi), %eax
mov b_offset(%edi), %ebx

20
arch/x86/crypto/twofish-x86_64-asm_64.S
View File

@ -221,11 +221,11 @@
twofish_enc_blk:
pushq R1
/* %rdi contains the crypto tfm adress */
/* %rsi contains the output adress */
/* %rdx contains the input adress */
add $crypto_tfm_ctx_offset, %rdi /* set ctx adress */
/* ctx adress is moved to free one non-rex register
/* %rdi contains the crypto tfm address */
/* %rsi contains the output address */
/* %rdx contains the input address */
add $crypto_tfm_ctx_offset, %rdi /* set ctx address */
/* ctx address is moved to free one non-rex register
as target for the 8bit high operations */
mov %rdi, %r11
@ -274,11 +274,11 @@ twofish_enc_blk:
twofish_dec_blk:
pushq R1
/* %rdi contains the crypto tfm adress */
/* %rsi contains the output adress */
/* %rdx contains the input adress */
add $crypto_tfm_ctx_offset, %rdi /* set ctx adress */
/* ctx adress is moved to free one non-rex register
/* %rdi contains the crypto tfm address */
/* %rsi contains the output address */
/* %rdx contains the input address */
add $crypto_tfm_ctx_offset, %rdi /* set ctx address */
/* ctx address is moved to free one non-rex register
as target for the 8bit high operations */
mov %rdi, %r11

2
arch/x86/kernel/head_64.S
View File

@ -27,7 +27,7 @@
#define GET_CR2_INTO_RCX movq %cr2, %rcx
#endif
/* we are not able to switch in one step to the final KERNEL ADRESS SPACE
/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
* because we need identity-mapped pages.
*
*/

2
arch/x86/kernel/pci-calgary_64.c
View File

@ -1309,7 +1309,7 @@ static void calgary_init_bitmap_from_tce_table(struct iommu_table *tbl)
/*
* get_tce_space_from_tar():
* Function for kdump case. Get the tce tables from first kernel
* by reading the contents of the base adress register of calgary iommu
* by reading the contents of the base address register of calgary iommu
*/
static void __init get_tce_space_from_tar(void)
{

2
arch/x86/kernel/tsc.c
View File

@ -50,7 +50,7 @@ u64 native_sched_clock(void)
* unstable. We do this because unlike Time Of Day,
* the scheduler clock tolerates small errors and it's
* very important for it to be as fast as the platform
* can achive it. )
* can achieve it. )
*/
if (unlikely(tsc_disabled)) {
/* No locking but a rare wrong value is not a big deal: */

4
arch/xtensa/kernel/entry.S
View File

@ -104,7 +104,7 @@
* excsave has been restored, and
* stack pointer (a1) has been set.
*
* Note: _user_exception might be at an odd adress. Don't use call0..call12
* Note: _user_exception might be at an odd address. Don't use call0..call12
*/
ENTRY(user_exception)
@ -244,7 +244,7 @@ _user_exception:
* excsave has been restored, and
* stack pointer (a1) has been set.
*
* Note: _kernel_exception might be at an odd adress. Don't use call0..call12
* Note: _kernel_exception might be at an odd address. Don't use call0..call12
*/
ENTRY(kernel_exception)

2
block/bsg.c
View File

@ -260,7 +260,7 @@ bsg_map_hdr(struct bsg_device *bd, struct sg_io_v4 *hdr, fmode_t has_write_perm,
return ERR_PTR(ret);
/*
* map scatter-gather elements seperately and string them to request
* map scatter-gather elements separately and string them to request
*/
rq = blk_get_request(q, rw, GFP_KERNEL);
if (!rq)

2
drivers/acpi/dock.c
View File

@ -605,7 +605,7 @@ register_hotplug_dock_device(acpi_handle handle, struct acpi_dock_ops *ops,
list_for_each_entry(dock_station, &dock_stations, sibling) {
/*
* An ATA bay can be in a dock and itself can be ejected
* seperately, so there are two 'dock stations' which need the
* separately, so there are two 'dock stations' which need the
* ops
*/
dd = find_dock_dependent_device(dock_station, handle);

2
drivers/ata/libata-sff.c
View File

@ -2258,7 +2258,7 @@ EXPORT_SYMBOL_GPL(ata_sff_postreset);
* @qc: command
*
* Drain the FIFO and device of any stuck data following a command
* failing to complete. In some cases this is neccessary before a
* failing to complete. In some cases this is necessary before a
* reset will recover the device.
*
*/

2
drivers/ata/pata_acpi.c
View File

@ -161,7 +161,7 @@ static void pacpi_set_dmamode(struct ata_port *ap, struct ata_device *adev)
*
* Called when the libata layer is about to issue a command. We wrap
* this interface so that we can load the correct ATA timings if
* neccessary.
* necessary.
*/
static unsigned int pacpi_qc_issue(struct ata_queued_cmd *qc)

2
drivers/ata/pata_hpt3x3.c
View File

@ -180,7 +180,7 @@ static void hpt3x3_init_chipset(struct pci_dev *dev)
* @id: Entry in match table
*
* Perform basic initialisation. We set the device up so we access all
* ports via BAR4. This is neccessary to work around errata.
* ports via BAR4. This is necessary to work around errata.
*/
static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id)

2
drivers/ata/pata_pcmcia.c
View File

@ -131,7 +131,7 @@ static unsigned int ata_data_xfer_8bit(struct ata_device *dev,
* @qc: command
*
* Drain the FIFO and device of any stuck data following a command
* failing to complete. In some cases this is neccessary before a
* failing to complete. In some cases this is necessary before a
* reset will recover the device.
*
*/

4
drivers/block/drbd/drbd_int.h
View File

@ -95,7 +95,7 @@ extern char usermode_helper[];
/* All EEs on the free list should have ID_VACANT (== 0)
* freshly allocated EEs get !ID_VACANT (== 1)
* so if it says "cannot dereference null pointer at adress 0x00000001",
* so if it says "cannot dereference null pointer at address 0x00000001",
* it is most likely one of these :( */
#define ID_IN_SYNC (4711ULL)
@ -1171,7 +1171,7 @@ extern int drbd_bitmap_io(struct drbd_conf *mdev, int (*io_fn)(struct drbd_conf
/* Meta data layout
We reserve a 128MB Block (4k aligned)
* either at the end of the backing device
* or on a seperate meta data device. */
* or on a separate meta data device. */
#define MD_RESERVED_SECT (128LU << 11) /* 128 MB, unit sectors */
/* The following numbers are sectors */

2
drivers/block/drbd/drbd_req.h
View File

@ -57,7 +57,7 @@
*
* It may me handed over to the local disk subsystem.
* It may be completed by the local disk subsystem,
* either sucessfully or with io-error.
* either successfully or with io-error.
* In case it is a READ request, and it failed locally,
* it may be retried remotely.
*

2
drivers/char/agp/intel-agp.c
View File

@ -269,7 +269,7 @@ static void intel_agp_insert_sg_entries(struct agp_memory *mem,
j++;
}
} else {
/* sg may merge pages, but we have to seperate
/* sg may merge pages, but we have to separate
* per-page addr for GTT */
unsigned int len, m;

2
drivers/char/applicom.c
View File

@ -14,7 +14,7 @@
/* et passe en argument a acinit, mais est scrute sur le bus pour s'adapter */
/* au nombre de cartes presentes sur le bus. IOCL code 6 affichait V2.4.3 */
/* F.LAFORSE 28/11/95 creation de fichiers acXX.o avec les differentes */
/* adresses de base des cartes, IOCTL 6 plus complet */
/* addresses de base des cartes, IOCTL 6 plus complet */
/* J.PAGET le 19/08/96 copie de la version V2.6 en V2.8.0 sans modification */
/* de code autre que le texte V2.6.1 en V2.8.0 */
/*****************************************************************************/

2
drivers/char/hvc_iseries.c
View File

@ -353,7 +353,7 @@ static void hvc_close_event(struct HvLpEvent *event)
if (!hvlpevent_is_int(event)) {
printk(KERN_WARNING
"hvc: got unexpected close acknowlegement\n");
"hvc: got unexpected close acknowledgement\n");
return;
}

2
drivers/char/hw_random/n2-drv.c
View File

@ -71,7 +71,7 @@ MODULE_VERSION(DRV_MODULE_VERSION);
* x22 + x21 + x17 + x15 + x13 + x12 + x11 + x7 + x5 + x + 1
*
* The RNG_CTL_VCO value of each noise cell must be programmed
* seperately. This is why 4 control register values must be provided
* separately. This is why 4 control register values must be provided
* to the hypervisor. During a write, the hypervisor writes them all,
* one at a time, to the actual RNG_CTL register. The first three
* values are used to setup the desired RNG_CTL_VCO for each entropy

2
drivers/char/ip2/i2hw.h
View File

@ -559,7 +559,7 @@ Loadware may be sent to the board in two ways:
2) It may be hard-coded into your source by including a .h file (typically
supplied by Computone), which declares a data array and initializes every
element. This acheives the same result as if an entire loadware file had
element. This achieves the same result as if an entire loadware file had
been read into the array.
This requires more data space in your program, but access to the file system

2
drivers/char/pty.c
View File

@ -220,7 +220,7 @@ static void pty_set_termios(struct tty_struct *tty,
* @tty: tty being resized
* @ws: window size being set.
*
* Update the termios variables and send the neccessary signals to
* Update the termios variables and send the necessary signals to
* peform a terminal resize correctly
*/

2
drivers/char/tty_io.c
View File

@ -2026,7 +2026,7 @@ static int tiocgwinsz(struct tty_struct *tty, struct winsize __user *arg)
* @rows: rows (character)
* @cols: cols (character)
*
* Update the termios variables and send the neccessary signals to
* Update the termios variables and send the necessary signals to
* peform a terminal resize correctly
*/

2
drivers/char/vt.c
View File

@ -821,7 +821,7 @@ static inline int resize_screen(struct vc_data *vc, int width, int height,
*
* Resize a virtual console, clipping according to the actual constraints.
* If the caller passes a tty structure then update the termios winsize
* information and perform any neccessary signal handling.
* information and perform any necessary signal handling.
*
* Caller must hold the console semaphore. Takes the termios mutex and
* ctrl_lock of the tty IFF a tty is passed.

2
drivers/dma/coh901318_lli.h
View File

@ -30,7 +30,7 @@ struct device;
* @pool: pool handle
* @dev: dma device
* @lli_nbr: number of lli:s in the pool
* @algin: adress alignemtn of lli:s
* @algin: address alignemtn of lli:s
* returns 0 on success otherwise none zero
*/
int coh901318_pool_create(struct coh901318_pool *pool,

2
drivers/gpu/drm/nouveau/nouveau_bios.c
View File

@ -3544,7 +3544,7 @@ int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, b
* at which modes should be set up in the dual link style.
*
* Following the header, the BMP (ver 0xa) table has several records,
* indexed by a seperate xlat table, indexed in turn by the fp strap in
* indexed by a separate xlat table, indexed in turn by the fp strap in
* EXTDEV_BOOT. Each record had a config byte, followed by 6 script
* numbers for use by INIT_SUB which controlled panel init and power,
* and finally a dword of ms to sleep between power off and on

2
drivers/gpu/drm/nouveau/nouveau_drv.h
View File

@ -544,7 +544,7 @@ struct drm_nouveau_private {
uint32_t ramro_offset;
uint32_t ramro_size;
/* base physical adresses */
/* base physical addresses */
uint64_t fb_phys;
uint64_t fb_available_size;
uint64_t fb_mappable_pages;

4
drivers/gpu/drm/via/via_irq.c
View File

@ -150,7 +150,7 @@ irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
cur_irq++;
}
/* Acknowlege interrupts */
/* Acknowledge interrupts */
VIA_WRITE(VIA_REG_INTERRUPT, status);
@ -165,7 +165,7 @@ static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
u32 status;
if (dev_priv) {
/* Acknowlege interrupts */
/* Acknowledge interrupts */
status = VIA_READ(VIA_REG_INTERRUPT);
VIA_WRITE(VIA_REG_INTERRUPT, status |
dev_priv->irq_pending_mask);

2
drivers/i2c/busses/i2c-pxa.c
View File

@ -12,7 +12,7 @@
*
* History:
* Apr 2002: Initial version [CS]
* Jun 2002: Properly seperated algo/adap [FB]
* Jun 2002: Properly separated algo/adap [FB]
* Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
* Jan 2003: added limited signal handling [Kai-Uwe Bloem]
* Sep 2004: Major rework to ensure efficient bus handling [RMK]

4
drivers/infiniband/hw/ehca/ehca_qes.h
View File

@ -46,7 +46,7 @@
#include "ehca_tools.h"
/* virtual scatter gather entry to specify remote adresses with length */
/* virtual scatter gather entry to specify remote addresses with length */
struct ehca_vsgentry {
u64 vaddr;
u32 lkey;
@ -148,7 +148,7 @@ struct ehca_wqe {
u32 immediate_data;
union {
struct {
u64 remote_virtual_adress;
u64 remote_virtual_address;
u32 rkey;
u32 reserved;
u64 atomic_1st_op_dma_len;

2
drivers/infiniband/hw/ehca/ehca_reqs.c
View File

@ -269,7 +269,7 @@ static inline int ehca_write_swqe(struct ehca_qp *qp,
/* no break is intentional here */
case IB_QPT_RC:
/* TODO: atomic not implemented */
wqe_p->u.nud.remote_virtual_adress =
wqe_p->u.nud.remote_virtual_address =
send_wr->wr.rdma.remote_addr;
wqe_p->u.nud.rkey = send_wr->wr.rdma.rkey;

2
drivers/input/misc/yealink.h
View File

@ -127,7 +127,7 @@ struct yld_ctl_packet {
* yld_status struct.
*/
/* LCD, each segment must be driven seperately.
/* LCD, each segment must be driven separately.
*
* Layout:
*

2
drivers/isdn/i4l/isdn_common.c
View File

@ -1347,7 +1347,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg)
/*
* isdn net devices manage lots of configuration variables as linked lists.
* Those lists must only be manipulated from user space. Some of the ioctl's
* service routines access user space and are not atomic. Therefor, ioctl's
* service routines access user space and are not atomic. Therefore, ioctl's
* manipulating the lists and ioctl's sleeping while accessing the lists
* are serialized by means of a semaphore.
*/

8
drivers/media/dvb/dvb-core/dvb_frontend.h
View File

@ -214,14 +214,14 @@ struct dvb_tuner_ops {
int (*get_status)(struct dvb_frontend *fe, u32 *status);
int (*get_rf_strength)(struct dvb_frontend *fe, u16 *strength);
/** These are provided seperately from set_params in order to facilitate silicon
* tuners which require sophisticated tuning loops, controlling each parameter seperately. */
/** These are provided separately from set_params in order to facilitate silicon
* tuners which require sophisticated tuning loops, controlling each parameter separately. */
int (*set_frequency)(struct dvb_frontend *fe, u32 frequency);
int (*set_bandwidth)(struct dvb_frontend *fe, u32 bandwidth);
/*
* These are provided seperately from set_params in order to facilitate silicon
* tuners which require sophisticated tuning loops, controlling each parameter seperately.
* These are provided separately from set_params in order to facilitate silicon
* tuners which require sophisticated tuning loops, controlling each parameter separately.
*/
int (*set_state)(struct dvb_frontend *fe, enum tuner_param param, struct tuner_state *state);
int (*get_state)(struct dvb_frontend *fe, enum tuner_param param, struct tuner_state *state);

4
drivers/media/video/bt8xx/bttv-cards.c
View File

@ -4404,7 +4404,7 @@ static void rv605_muxsel(struct bttv *btv, unsigned int input)
/* Tibet Systems 'Progress DVR' CS16 muxsel helper [Chris Fanning]
*
* The CS16 (available on eBay cheap) is a PCI board with four Fusion
* 878A chips, a PCI bridge, an Atmel microcontroller, four sync seperator
* 878A chips, a PCI bridge, an Atmel microcontroller, four sync separator
* chips, ten eight input analog multiplexors, a not chip and a few
* other components.
*
@ -4426,7 +4426,7 @@ static void rv605_muxsel(struct bttv *btv, unsigned int input)
*
* There is an ATMEL microcontroller with an 8031 core on board. I have not
* determined what function (if any) it provides. With the microcontroller
* and sync seperator chips a guess is that it might have to do with video
* and sync separator chips a guess is that it might have to do with video
* switching and maybe some digital I/O.
*/
static void tibetCS16_muxsel(struct bttv *btv, unsigned int input)

2
drivers/media/video/gspca/ov519.c
View File

@ -503,7 +503,7 @@ static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
/*
* The FX2 chip does not give us a zero length read at end of frame.
* It does, however, give a short read at the end of a frame, if
* neccessary, rather than run two frames together.
* necessary, rather than run two frames together.
*
* By choosing the right bulk transfer size, we are guaranteed to always
* get a short read for the last read of each frame. Frame sizes are

2
drivers/media/video/pwc/philips.txt
View File

@ -33,7 +33,7 @@ a lot of extra information, a FAQ, and the binary plugin 'PWCX'. This plugin
contains decompression routines that allow you to use higher image sizes and
framerates; in addition the webcam uses less bandwidth on the USB bus (handy
if you want to run more than 1 camera simultaneously). These routines fall
under a NDA, and may therefor not be distributed as source; however, its use
under a NDA, and may therefore not be distributed as source; however, its use
is completely optional.
You can build this code either into your kernel, or as a module. I recommend

2
drivers/media/video/sn9c102/sn9c102_sensor.h
View File

@ -120,7 +120,7 @@ extern int sn9c102_write_regs(struct sn9c102_device*, const u8 valreg[][2],
/*
Write multiple registers with constant values. For example:
sn9c102_write_const_regs(cam, {0x00, 0x14}, {0x60, 0x17}, {0x0f, 0x18});
Register adresses must be < 256.
Register addresses must be < 256.
*/
#define sn9c102_write_const_regs(sn9c102_device, data...) \
({ static const u8 _valreg[][2] = {data}; \

2
drivers/media/video/tea6420.c
View File

@ -6,7 +6,7 @@
The tea6420 is a bus controlled audio-matrix with 5 stereo inputs,
4 stereo outputs and gain control for each output.
It is cascadable, i.e. it can be found at the adresses 0x98
It is cascadable, i.e. it can be found at the addresses 0x98
and 0x9a on the i2c-bus.
For detailed informations download the specifications directly

8
drivers/mfd/sm501.c
View File

@ -523,7 +523,7 @@ unsigned long sm501_set_clock(struct device *dev,
unsigned long clock = readl(sm->regs + SM501_CURRENT_CLOCK);
unsigned char reg;
unsigned int pll_reg = 0;
unsigned long sm501_freq; /* the actual frequency acheived */
unsigned long sm501_freq; /* the actual frequency achieved */
struct sm501_clock to;
@ -533,7 +533,7 @@ unsigned long sm501_set_clock(struct device *dev,
switch (clksrc) {
case SM501_CLOCK_P2XCLK:
/* This clock is divided in half so to achive the
/* This clock is divided in half so to achieve the
* requested frequency the value must be multiplied by
* 2. This clock also has an additional pre divisor */
@ -562,7 +562,7 @@ unsigned long sm501_set_clock(struct device *dev,
break;
case SM501_CLOCK_V2XCLK:
/* This clock is divided in half so to achive the
/* This clock is divided in half so to achieve the
* requested frequency the value must be multiplied by 2. */
sm501_freq = (sm501_select_clock(2 * req_freq, &to, 3) / 2);
@ -648,7 +648,7 @@ unsigned long sm501_find_clock(struct device *dev,
unsigned long req_freq)
{
struct sm501_devdata *sm = dev_get_drvdata(dev);
unsigned long sm501_freq; /* the frequency achiveable by the 501 */
unsigned long sm501_freq; /* the frequency achieveable by the 501 */
struct sm501_clock to;
switch (clksrc) {

2
drivers/mmc/host/mxcmmc.c
View File

@ -4,7 +4,7 @@
* This is a driver for the SDHC controller found in Freescale MX2/MX3
* SoCs. It is basically the same hardware as found on MX1 (imxmmc.c).
* Unlike the hardware found on MX1, this hardware just works and does
* not need all the quirks found in imxmmc.c, hence the seperate driver.
* not need all the quirks found in imxmmc.c, hence the separate driver.
*
* Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
* Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com>

2
drivers/mtd/chips/jedec_probe.c
View File

@ -226,7 +226,7 @@ struct unlock_addr {
* exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
* should not be used. The problem is that structures with
* initializers have extra fields initialized to 0. It is _very_
* desireable to have the unlock address entries for unsupported
* desirable to have the unlock address entries for unsupported
* data widths automatically initialized - that means that
* MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
* must go unused.

4
drivers/mtd/nand/bcm_umi_nand.c
View File

@ -381,7 +381,7 @@ static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
if (!r)
return -ENXIO;
/* map physical adress */
/* map physical address */
bcm_umi_io_base = ioremap(r->start, r->end - r->start + 1);
if (!bcm_umi_io_base) {
@ -525,7 +525,7 @@ static int bcm_umi_nand_remove(struct platform_device *pdev)
/* Release resources, unregister device */
nand_release(board_mtd);
/* unmap physical adress */
/* unmap physical address */
iounmap(bcm_umi_io_base);
/* Free the MTD device structure */

2
drivers/mtd/nand/mxc_nand.c
View File

@ -507,7 +507,7 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr)
* MXC NANDFC can only perform full page+spare or
* spare-only read/write. When the upper layers
* layers perform a read/write buf operation,
* we will used the saved column adress to index into
* we will used the saved column address to index into
* the full page.
*/
send_addr(host, 0, page_addr == -1);

2
drivers/net/atlx/atl2.h
View File

@ -442,7 +442,7 @@ struct atl2_hw {
struct atl2_ring_header {
/* pointer to the descriptor ring memory */
void *desc;
/* physical adress of the descriptor ring */
/* physical address of the descriptor ring */
dma_addr_t dma;
/* length of descriptor ring in bytes */
unsigned int size;

2
drivers/net/chelsio/sge.c
View File

@ -248,7 +248,7 @@ static void restart_sched(unsigned long);
*
* Interrupts are handled by a single CPU and it is likely that on a MP system
* the application is migrated to another CPU. In that scenario, we try to
* seperate the RX(in irq context) and TX state in order to decrease memory
* separate the RX(in irq context) and TX state in order to decrease memory
* contention.
*/
struct sge {

2
drivers/net/e1000e/82571.c
View File

@ -1363,7 +1363,7 @@ static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
*
* 1) down
* 2) autoneg_progress
* 3) autoneg_complete (the link sucessfully autonegotiated)
* 3) autoneg_complete (the link successfully autonegotiated)
* 4) forced_up (the link has been forced up, it did not autonegotiate)
*
**/

2
drivers/net/e1000e/lib.c
View File

@ -587,7 +587,7 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw)
if (!(rxcw & E1000_RXCW_IV)) {
mac->serdes_has_link = true;
e_dbg("SERDES: Link up - autoneg "
"completed sucessfully.\n");
"completed successfully.\n");
} else {
mac->serdes_has_link = false;
e_dbg("SERDES: Link down - invalid"

2
drivers/net/igb/igb_main.c
View File

@ -674,7 +674,7 @@ static void igb_set_interrupt_capability(struct igb_adapter *adapter)
/* start with one vector for every rx queue */
numvecs = adapter->num_rx_queues;
/* if tx handler is seperate add 1 for every tx queue */
/* if tx handler is separate add 1 for every tx queue */
if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
numvecs += adapter->num_tx_queues;

2
drivers/net/irda/sa1100_ir.c
View File

@ -331,7 +331,7 @@ static int sa1100_irda_resume(struct platform_device *pdev)
* If we missed a speed change, initialise at the new speed
* directly. It is debatable whether this is actually
* required, but in the interests of continuing from where
* we left off it is desireable. The converse argument is
* we left off it is desirable. The converse argument is
* that we should re-negotiate at 9600 baud again.
*/
if (si->newspeed) {

2
drivers/net/qlge/qlge_ethtool.c
View File

@ -402,7 +402,7 @@ static int ql_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
u32 wol = 0;
status = ql_mb_wol_mode(qdev, wol);
QPRINTK(qdev, DRV, ERR, "WOL %s (wol code 0x%x) on %s\n",
(status == 0) ? "cleared sucessfully" : "clear failed",
(status == 0) ? "cleared successfully" : "clear failed",
wol, qdev->ndev->name);
}

2
drivers/net/qlge/qlge_main.c
View File

@ -3517,7 +3517,7 @@ int ql_wol(struct ql_adapter *qdev)
wol |= MB_WOL_MODE_ON;
status = ql_mb_wol_mode(qdev, wol);
QPRINTK(qdev, DRV, ERR, "WOL %s (wol code 0x%x) on %s\n",
(status == 0) ? "Sucessfully set" : "Failed", wol,
(status == 0) ? "Successfully set" : "Failed", wol,
qdev->ndev->name);
}

2
drivers/net/sfc/regs.h
View File

@ -95,7 +95,7 @@
#define FRF_AA_INT_ACK_KER_FIELD_LBN 0
#define FRF_AA_INT_ACK_KER_FIELD_WIDTH 32
/* INT_ISR0_REG: Function 0 Interrupt Acknowlege Status register */
/* INT_ISR0_REG: Function 0 Interrupt Acknowledge Status register */
#define FR_BZ_INT_ISR0 0x00000090
#define FRF_BZ_INT_ISR_REG_LBN 0
#define FRF_BZ_INT_ISR_REG_WIDTH 64

2
drivers/net/smsc9420.c
View File

@ -1348,7 +1348,7 @@ static int smsc9420_open(struct net_device *dev)
netif_carrier_off(dev);
/* disable, mask and acknowlege all interrupts */
/* disable, mask and acknowledge all interrupts */
spin_lock_irqsave(&pd->int_lock, flags);
int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_);
smsc9420_reg_write(pd, INT_CFG, int_cfg);

4
drivers/net/spider_net.c
View File

@ -474,7 +474,7 @@ spider_net_prepare_rx_descr(struct spider_net_card *card,
* spider_net_enable_rxchtails - sets RX dmac chain tail addresses
* @card: card structure
*
* spider_net_enable_rxchtails sets the RX DMAC chain tail adresses in the
* spider_net_enable_rxchtails sets the RX DMAC chain tail addresses in the
* chip by writing to the appropriate register. DMA is enabled in
* spider_net_enable_rxdmac.
*/
@ -1820,7 +1820,7 @@ spider_net_enable_card(struct spider_net_card *card)
spider_net_write_reg(card, SPIDER_NET_ECMODE, SPIDER_NET_ECMODE_VALUE);
/* set chain tail adress for RX chains and
/* set chain tail address for RX chains and
* enable DMA */
spider_net_enable_rxchtails(card);
spider_net_enable_rxdmac(card);

2
drivers/net/sungem.c
View File

@ -782,7 +782,7 @@ static int gem_rx(struct gem *gp, int work_to_do)
break;
/* When writing back RX descriptor, GEM writes status
* then buffer address, possibly in seperate transactions.
* then buffer address, possibly in separate transactions.
* If we don't wait for the chip to write both, we could
* post a new buffer to this descriptor then have GEM spam
* on the buffer address. We sync on the RX completion

2
drivers/net/tehuti.c
View File

@ -1857,7 +1857,7 @@ static void bdx_tx_push_desc(struct bdx_priv *priv, void *data, int size)
* @data - desc's data
* @size - desc's size
*
* NOTE: this func does check for available space and, if neccessary, waits for
* NOTE: this func does check for available space and, if necessary, waits for
* NIC to read existing data before writing new one.
*/
static void bdx_tx_push_desc_safe(struct bdx_priv *priv, void *data, int size)

4
drivers/net/tokenring/tms380tr.c
View File

@ -693,7 +693,7 @@ static netdev_tx_t tms380tr_hardware_send_packet(struct sk_buff *skb,
* NOTE: This function should be used whenever the status of any TPL must be
* modified by the driver, because the compiler may otherwise change the
* order of instructions such that writing the TPL status may be executed at
* an undesireable time. When this function is used, the status is always
* an undesirable time. When this function is used, the status is always
* written when the function is called.
*/
static void tms380tr_write_tpl_status(TPL *tpl, unsigned int Status)
@ -2266,7 +2266,7 @@ static void tms380tr_rcv_status_irq(struct net_device *dev)
* This function should be used whenever the status of any RPL must be
* modified by the driver, because the compiler may otherwise change the
* order of instructions such that writing the RPL status may be executed
* at an undesireable time. When this function is used, the status is
* at an undesirable time. When this function is used, the status is
* always written when the function is called.
*/
static void tms380tr_write_rpl_status(RPL *rpl, unsigned int Status)

2
drivers/net/tun.c
View File

@ -1365,7 +1365,7 @@ static int tun_chr_close(struct inode *inode, struct file *file)
__tun_detach(tun);
/* If desireable, unregister the netdevice. */
/* If desirable, unregister the netdevice. */
if (!(tun->flags & TUN_PERSIST)) {
rtnl_lock();
if (dev->reg_state == NETREG_REGISTERED)

2
drivers/net/ucc_geth.c
View File

@ -429,7 +429,7 @@ static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth,
ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
/* Ethernet frames are defined in Little Endian mode,
therefor to insert */
therefore to insert */
/* the address to the hash (Big Endian mode), we reverse the bytes.*/
set_mac_addr(&p_82xx_addr_filt->taddr.h, p_enet_addr);

2
drivers/net/wimax/i2400m/fw.c
View File

@ -612,7 +612,7 @@ ssize_t i2400m_bm_cmd(struct i2400m *i2400m,
goto error_wait_for_ack;
}
rx_bytes = result;
/* verify the ack and read more if neccessary [result is the
/* verify the ack and read more if necessary [result is the
* final amount of bytes we get in the ack] */
result = __i2400m_bm_ack_verify(i2400m, opcode, ack, ack_size, flags);
if (result < 0)

2
drivers/net/wimax/i2400m/i2400m.h
View File

@ -627,7 +627,7 @@ enum i2400m_bm_cmd_flags {
* @I2400M_BRI_NO_REBOOT: Do not reboot the device and proceed
* directly to wait for a reboot barker from the device.
* @I2400M_BRI_MAC_REINIT: We need to reinitialize the boot
* rom after reading the MAC adress. This is quite a dirty hack,
* rom after reading the MAC address. This is quite a dirty hack,
* if you ask me -- the device requires the bootrom to be
* intialized after reading the MAC address.
*/

4
drivers/net/wimax/i2400m/sdio.c
View File

@ -304,7 +304,7 @@ error_kzalloc:
*
* The device will be fully reset internally, but won't be
* disconnected from the bus (so no reenumeration will
* happen). Firmware upload will be neccessary.
* happen). Firmware upload will be necessary.
*
* The device will send a reboot barker that will trigger the driver
* to reinitialize the state via __i2400m_dev_reset_handle.
@ -314,7 +314,7 @@ error_kzalloc:
*
* The device will be fully reset internally, disconnected from the
* bus an a reenumeration will happen. Firmware upload will be
* neccessary. Thus, we don't do any locking or struct
* necessary. Thus, we don't do any locking or struct
* reinitialization, as we are going to be fully disconnected and
* reenumerated.
*

4
drivers/net/wimax/i2400m/usb.c
View File

@ -246,7 +246,7 @@ error_kzalloc:
*
* The device will be fully reset internally, but won't be
* disconnected from the USB bus (so no reenumeration will
* happen). Firmware upload will be neccessary.
* happen). Firmware upload will be necessary.
*
* The device will send a reboot barker in the notification endpoint
* that will trigger the driver to reinitialize the state
@ -257,7 +257,7 @@ error_kzalloc:
*
* The device will be fully reset internally, disconnected from the
* USB bus an a reenumeration will happen. Firmware upload will be
* neccessary. Thus, we don't do any locking or struct
* necessary. Thus, we don't do any locking or struct
* reinitialization, as we are going to be fully disconnected and
* reenumerated.
*

2
drivers/net/wireless/ath/ar9170/main.c
View File

@ -2535,7 +2535,7 @@ void *ar9170_alloc(size_t priv_size)
/*
* this buffer is used for rx stream reconstruction.
* Under heavy load this device (or the transport layer?)
* tends to split the streams into seperate rx descriptors.
* tends to split the streams into separate rx descriptors.
*/
skb = __dev_alloc_skb(AR9170_MAX_RX_BUFFER_SIZE, GFP_KERNEL);

2
drivers/net/wireless/iwmc3200wifi/lmac.h
View File

@ -262,7 +262,7 @@ struct iwm_ct_kill_cfg_cmd {
/* Power Management */
#define POWER_TABLE_CMD 0x77
#define SAVE_RESTORE_ADRESS_CMD 0x78
#define SAVE_RESTORE_ADDRESS_CMD 0x78
#define REPLY_WATERMARK_CMD 0x79
#define PM_DEBUG_STATISTIC_NOTIFIC 0x7B
#define PD_FLUSH_N_NOTIFICATION 0x7C

4
drivers/net/wireless/rt2x00/rt2500usb.c
View File

@ -368,7 +368,7 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
/*
* The encryption key doesn't fit within the CSR cache,
* this means we should allocate it seperately and use
* this means we should allocate it separately and use
* rt2x00usb_vendor_request() to send the key to the hardware.
*/
reg = KEY_ENTRY(key->hw_key_idx);
@ -382,7 +382,7 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
/*
* The driver does not support the IV/EIV generation
* in hardware. However it demands the data to be provided
* both seperately as well as inside the frame.
* both separately as well as inside the frame.
* We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
* to ensure rt2x00lib will not strip the data from the
* frame after the copy, now we must tell mac80211

4
drivers/net/wireless/rt2x00/rt2800usb.c
View File

@ -100,7 +100,7 @@ static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
* There are 2 variations of the rt2870 firmware.
* a) size: 4kb
* b) size: 8kb
* Note that (b) contains 2 seperate firmware blobs of 4k
* Note that (b) contains 2 separate firmware blobs of 4k
* within the file. The first blob is the same firmware as (a),
* but the second blob is for the additional chipsets.
*/
@ -118,7 +118,7 @@ static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
/*
* 8kb firmware files must be checked as if it were
* 2 seperate firmware files.
* 2 separate firmware files.
*/
while (offset < len) {
if (!rt2800usb_check_crc(data + offset, 4096))

2
drivers/net/wireless/rt2x00/rt2x00debug.c
View File

@ -109,7 +109,7 @@ struct rt2x00debug_intf {
/*
* HW crypto statistics.
* All statistics are stored seperately per cipher type.
* All statistics are stored separately per cipher type.
*/
struct rt2x00debug_crypto crypto_stats[CIPHER_MAX];

2
drivers/net/wireless/rt2x00/rt2x00dev.c
View File

@ -397,7 +397,7 @@ void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev,
/*
* Hardware might have stripped the IV/EIV/ICV data,
* in that case it is possible that the data was
* provided seperately (through hardware descriptor)
* provided separately (through hardware descriptor)
* in which case we should reinsert the data into the frame.
*/
if ((rxdesc.dev_flags & RXDONE_CRYPTO_IV) &&

2
drivers/net/wireless/rt2x00/rt2x00queue.c
View File

@ -502,7 +502,7 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
/*
* When hardware encryption is supported, and this frame
* is to be encrypted, we should strip the IV/EIV data from
* the frame so we can provide it to the driver seperately.
* the frame so we can provide it to the driver separately.
*/
if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
!test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {

2
drivers/net/wireless/rt2x00/rt61pci.c
View File

@ -476,7 +476,7 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
* The driver does not support the IV/EIV generation
* in hardware. However it doesn't support the IV/EIV
* inside the ieee80211 frame either, but requires it
* to be provided seperately for the descriptor.
* to be provided separately for the descriptor.
* rt2x00lib will cut the IV/EIV data out of all frames
* given to us by mac80211, but we must tell mac80211
* to generate the IV/EIV data.

6
drivers/net/wireless/rt2x00/rt73usb.c
View File

@ -339,7 +339,7 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
* The driver does not support the IV/EIV generation
* in hardware. However it doesn't support the IV/EIV
* inside the ieee80211 frame either, but requires it
* to be provided seperately for the descriptor.
* to be provided separately for the descriptor.
* rt2x00lib will cut the IV/EIV data out of all frames
* given to us by mac80211, but we must tell mac80211
* to generate the IV/EIV data.
@ -439,7 +439,7 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
* The driver does not support the IV/EIV generation
* in hardware. However it doesn't support the IV/EIV
* inside the ieee80211 frame either, but requires it
* to be provided seperately for the descriptor.
* to be provided separately for the descriptor.
* rt2x00lib will cut the IV/EIV data out of all frames
* given to us by mac80211, but we must tell mac80211
* to generate the IV/EIV data.
@ -1665,7 +1665,7 @@ static void rt73usb_fill_rxdone(struct queue_entry *entry,
/*
* Hardware has stripped IV/EIV data from 802.11 frame during
* decryption. It has provided the data seperately but rt2x00lib
* decryption. It has provided the data separately but rt2x00lib
* should decide if it should be reinserted.
*/
rxdesc->flags |= RX_FLAG_IV_STRIPPED;

2
drivers/s390/char/raw3270.c
View File

@ -373,7 +373,7 @@ raw3270_irq (struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
rq->rc = ccw_device_start(rp->cdev, &rq->ccw,
(unsigned long) rq, 0, 0);
if (rq->rc == 0)
return; /* Sucessfully restarted. */
return; /* Successfully restarted. */
break;
case RAW3270_IO_STOP:
if (!rq)

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