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iio: adc: hi8435: Fix alignment for DMA safety

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[ Upstream commit 48e4ae96b0b10f93de23b86fd34e573c44e95ab3 ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 72aa29ce0a59 ("iio: adc: hi8435: Holt HI-8435 threshold detector")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-21-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Jonathan Cameron 2022-05-08 18:56:00 +01:00 committed by Greg Kroah-Hartman
parent cfddd869da
commit 3ad6dfff2c
1 changed files with 1 additions and 1 deletions
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drivers/iio/adc/hi8435.c
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@ -49,7 +49,7 @@ struct hi8435_priv {
unsigned threshold_lo[2]; /* GND-Open and Supply-Open thresholds */
unsigned threshold_hi[2]; /* GND-Open and Supply-Open thresholds */
u8 reg_buffer[3] ____cacheline_aligned;
u8 reg_buffer[3] __aligned(IIO_DMA_MINALIGN);
};
static int hi8435_readb(struct hi8435_priv *priv, u8 reg, u8 *val)