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DMAENGINE: ste_dma40: removed a few magic numbers

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Make sure to extract the revision field explicitly and document
what bits are being accessed here without magic numbers.

Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Jonas Aaberg 2010-08-09 12:08:18 +00:00 committed by Dan Williams
parent 0246e77b4d
commit 3ae0267fd5
2 changed files with 15 additions and 6 deletions
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18
drivers/dma/ste_dma40.c
View File

@ -41,7 +41,7 @@
#define D40_ALLOC_LOG_FREE 0 #define D40_ALLOC_LOG_FREE 0
/* Hardware designer of the block */ /* Hardware designer of the block */
#define D40_PERIPHID2_DESIGNER 0x8 #define D40_HW_DESIGNER 0x8
/** /**
* enum 40_command - The different commands and/or statuses. * enum 40_command - The different commands and/or statuses.
@ -2438,6 +2438,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev)
int num_phy_chans; int num_phy_chans;
int i; int i;
u32 val; u32 val;
u32 rev;
clk = clk_get(&pdev->dev, NULL); clk = clk_get(&pdev->dev, NULL);
@ -2476,21 +2477,26 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev)
} }
} }
/* Get silicon revision */ /* Get silicon revision and designer */
val = readl(virtbase + D40_DREG_PERIPHID2); val = readl(virtbase + D40_DREG_PERIPHID2);
if ((val & 0xf) != D40_PERIPHID2_DESIGNER) { if ((val & D40_DREG_PERIPHID2_DESIGNER_MASK) !=
D40_HW_DESIGNER) {
dev_err(&pdev->dev, dev_err(&pdev->dev,
"[%s] Unknown designer! Got %x wanted %x\n", "[%s] Unknown designer! Got %x wanted %x\n",
__func__, val & 0xf, D40_PERIPHID2_DESIGNER); __func__, val & D40_DREG_PERIPHID2_DESIGNER_MASK,
D40_HW_DESIGNER);
goto failure; goto failure;
} }
rev = (val & D40_DREG_PERIPHID2_REV_MASK) >>
D40_DREG_PERIPHID2_REV_POS;
/* The number of physical channels on this HW */ /* The number of physical channels on this HW */
num_phy_chans = 4 * (readl(virtbase + D40_DREG_ICFG) & 0x7) + 4; num_phy_chans = 4 * (readl(virtbase + D40_DREG_ICFG) & 0x7) + 4;
dev_info(&pdev->dev, "hardware revision: %d @ 0x%x\n", dev_info(&pdev->dev, "hardware revision: %d @ 0x%x\n",
(val >> 4) & 0xf, res->start); rev, res->start);
plat_data = pdev->dev.platform_data; plat_data = pdev->dev.platform_data;
@ -2512,7 +2518,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev)
goto failure; goto failure;
} }
base->rev = (val >> 4) & 0xf; base->rev = rev;
base->clk = clk; base->clk = clk;
base->num_phy_chans = num_phy_chans; base->num_phy_chans = num_phy_chans;
base->num_log_chans = num_log_chans; base->num_log_chans = num_log_chans;

3
drivers/dma/ste_dma40_ll.h
View File

@ -163,6 +163,9 @@
#define D40_DREG_PERIPHID0 0xFE0 #define D40_DREG_PERIPHID0 0xFE0
#define D40_DREG_PERIPHID1 0xFE4 #define D40_DREG_PERIPHID1 0xFE4
#define D40_DREG_PERIPHID2 0xFE8 #define D40_DREG_PERIPHID2 0xFE8
#define D40_DREG_PERIPHID2_REV_POS 4
#define D40_DREG_PERIPHID2_REV_MASK (0xf << D40_DREG_PERIPHID2_REV_POS)
#define D40_DREG_PERIPHID2_DESIGNER_MASK 0xf
#define D40_DREG_PERIPHID3 0xFEC #define D40_DREG_PERIPHID3 0xFEC
#define D40_DREG_CELLID0 0xFF0 #define D40_DREG_CELLID0 0xFF0
#define D40_DREG_CELLID1 0xFF4 #define D40_DREG_CELLID1 0xFF4