perf/x86/intel/uncore: Add Sapphire Rapids server IIO support
The IIO stacks are responsible for managing the traffic between the PCI Express* (PCIe*) domain and the mesh domain. The IIO PMON block is situated near the IIO stacks traffic controller capturing the traffic controller as well as the PCIe* root port information. The layout of the control registers for a IIO uncore unit is a little bit different from the generic one. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Andi Kleen <ak@linux.intel.com> Link: https://lore.kernel.org/r/1625087320-194204-4-git-send-email-kan.liang@linux.intel.com
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@ -5596,11 +5596,18 @@ static struct intel_uncore_type spr_uncore_chabox = {
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.format_group = &spr_uncore_chabox_format_group,
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};
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static struct intel_uncore_type spr_uncore_iio = {
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.name = "iio",
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.event_mask = SNBEP_PMON_RAW_EVENT_MASK,
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.event_mask_ext = SNR_IIO_PMON_RAW_EVENT_MASK_EXT,
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.format_group = &snr_uncore_iio_format_group,
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};
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#define UNCORE_SPR_NUM_UNCORE_TYPES 12
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static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = {
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&spr_uncore_chabox,
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NULL,
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&spr_uncore_iio,
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NULL,
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NULL,
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NULL,
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