Merge remote-tracking branches 'spi/topic/atmel', 'spi/topic/cadence', 'spi/topic/dw' and 'spi/topic/fsl-cpm' into spi-next
This commit is contained in:
Mark Brown
commit
3bcfca617a
@ -26,6 +26,7 @@
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pm_runtime.h>
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/* SPI register offsets */
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#define SPI_CR 0x0000
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@ -191,6 +192,8 @@
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#define SPI_DMA_TIMEOUT (msecs_to_jiffies(1000))
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#define AUTOSUSPEND_TIMEOUT 2000
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struct atmel_spi_dma {
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struct dma_chan *chan_rx;
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struct dma_chan *chan_tx;
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@ -414,23 +417,6 @@ static int atmel_spi_dma_slave_config(struct atmel_spi *as,
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return err;
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}
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static bool filter(struct dma_chan *chan, void *pdata)
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{
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struct atmel_spi_dma *sl_pdata = pdata;
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struct at_dma_slave *sl;
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if (!sl_pdata)
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return false;
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sl = &sl_pdata->dma_slave;
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if (sl->dma_dev == chan->device->dev) {
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chan->private = sl;
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return true;
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} else {
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return false;
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}
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}
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static int atmel_spi_configure_dma(struct atmel_spi *as)
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{
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struct dma_slave_config slave_config;
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@ -441,19 +427,24 @@ static int atmel_spi_configure_dma(struct atmel_spi *as)
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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as->dma.chan_tx = dma_request_slave_channel_compat(mask, filter,
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&as->dma,
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dev, "tx");
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if (!as->dma.chan_tx) {
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as->dma.chan_tx = dma_request_slave_channel_reason(dev, "tx");
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if (IS_ERR(as->dma.chan_tx)) {
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err = PTR_ERR(as->dma.chan_tx);
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if (err == -EPROBE_DEFER) {
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dev_warn(dev, "no DMA channel available at the moment\n");
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return err;
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}
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dev_err(dev,
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"DMA TX channel not available, SPI unable to use DMA\n");
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err = -EBUSY;
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goto error;
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}
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as->dma.chan_rx = dma_request_slave_channel_compat(mask, filter,
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&as->dma,
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dev, "rx");
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/*
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* No reason to check EPROBE_DEFER here since we have already requested
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* tx channel. If it fails here, it's for another reason.
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*/
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as->dma.chan_rx = dma_request_slave_channel(dev, "rx");
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if (!as->dma.chan_rx) {
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dev_err(dev,
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@ -474,7 +465,7 @@ static int atmel_spi_configure_dma(struct atmel_spi *as)
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error:
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if (as->dma.chan_rx)
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dma_release_channel(as->dma.chan_rx);
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if (as->dma.chan_tx)
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if (!IS_ERR(as->dma.chan_tx))
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dma_release_channel(as->dma.chan_tx);
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return err;
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}
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@ -482,11 +473,9 @@ error:
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static void atmel_spi_stop_dma(struct atmel_spi *as)
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{
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if (as->dma.chan_rx)
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as->dma.chan_rx->device->device_control(as->dma.chan_rx,
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DMA_TERMINATE_ALL, 0);
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dmaengine_terminate_all(as->dma.chan_rx);
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if (as->dma.chan_tx)
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as->dma.chan_tx->device->device_control(as->dma.chan_tx,
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DMA_TERMINATE_ALL, 0);
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dmaengine_terminate_all(as->dma.chan_tx);
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}
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static void atmel_spi_release_dma(struct atmel_spi *as)
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@ -1315,6 +1304,7 @@ static int atmel_spi_probe(struct platform_device *pdev)
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master->setup = atmel_spi_setup;
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master->transfer_one_message = atmel_spi_transfer_one_message;
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master->cleanup = atmel_spi_cleanup;
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master->auto_runtime_pm = true;
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platform_set_drvdata(pdev, master);
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as = spi_master_get_devdata(master);
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@ -1347,8 +1337,11 @@ static int atmel_spi_probe(struct platform_device *pdev)
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as->use_dma = false;
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as->use_pdc = false;
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if (as->caps.has_dma_support) {
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if (atmel_spi_configure_dma(as) == 0)
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ret = atmel_spi_configure_dma(as);
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if (ret == 0)
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as->use_dma = true;
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else if (ret == -EPROBE_DEFER)
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return ret;
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} else {
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as->use_pdc = true;
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}
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@ -1387,6 +1380,11 @@ static int atmel_spi_probe(struct platform_device *pdev)
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dev_info(&pdev->dev, "Atmel SPI Controller at 0x%08lx (irq %d)\n",
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(unsigned long)regs->start, irq);
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pm_runtime_set_autosuspend_delay(&pdev->dev, AUTOSUSPEND_TIMEOUT);
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pm_runtime_use_autosuspend(&pdev->dev);
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pm_runtime_set_active(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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ret = devm_spi_register_master(&pdev->dev, master);
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if (ret)
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goto out_free_dma;
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@ -1394,6 +1392,9 @@ static int atmel_spi_probe(struct platform_device *pdev)
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return 0;
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out_free_dma:
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pm_runtime_disable(&pdev->dev);
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pm_runtime_set_suspended(&pdev->dev);
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if (as->use_dma)
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atmel_spi_release_dma(as);
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@ -1415,6 +1416,8 @@ static int atmel_spi_remove(struct platform_device *pdev)
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struct spi_master *master = platform_get_drvdata(pdev);
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struct atmel_spi *as = spi_master_get_devdata(master);
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pm_runtime_get_sync(&pdev->dev);
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/* reset the hardware and block queue progress */
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spin_lock_irq(&as->lock);
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if (as->use_dma) {
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@ -1432,14 +1435,37 @@ static int atmel_spi_remove(struct platform_device *pdev)
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clk_disable_unprepare(as->clk);
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pm_runtime_put_noidle(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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#ifdef CONFIG_PM
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static int atmel_spi_runtime_suspend(struct device *dev)
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{
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struct spi_master *master = dev_get_drvdata(dev);
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struct atmel_spi *as = spi_master_get_devdata(master);
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clk_disable_unprepare(as->clk);
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pinctrl_pm_select_sleep_state(dev);
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return 0;
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}
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static int atmel_spi_runtime_resume(struct device *dev)
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{
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struct spi_master *master = dev_get_drvdata(dev);
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struct atmel_spi *as = spi_master_get_devdata(master);
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pinctrl_pm_select_default_state(dev);
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return clk_prepare_enable(as->clk);
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}
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static int atmel_spi_suspend(struct device *dev)
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{
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struct spi_master *master = dev_get_drvdata(dev);
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struct atmel_spi *as = spi_master_get_devdata(master);
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struct spi_master *master = dev_get_drvdata(dev);
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int ret;
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/* Stop the queue running */
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@ -1449,22 +1475,22 @@ static int atmel_spi_suspend(struct device *dev)
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return ret;
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}
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clk_disable_unprepare(as->clk);
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pinctrl_pm_select_sleep_state(dev);
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if (!pm_runtime_suspended(dev))
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atmel_spi_runtime_suspend(dev);
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return 0;
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}
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static int atmel_spi_resume(struct device *dev)
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{
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struct spi_master *master = dev_get_drvdata(dev);
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struct atmel_spi *as = spi_master_get_devdata(master);
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struct spi_master *master = dev_get_drvdata(dev);
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int ret;
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pinctrl_pm_select_default_state(dev);
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clk_prepare_enable(as->clk);
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if (!pm_runtime_suspended(dev)) {
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ret = atmel_spi_runtime_resume(dev);
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if (ret)
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return ret;
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}
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/* Start the queue running */
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ret = spi_master_resume(master);
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@ -1474,8 +1500,11 @@ static int atmel_spi_resume(struct device *dev)
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return ret;
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}
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static SIMPLE_DEV_PM_OPS(atmel_spi_pm_ops, atmel_spi_suspend, atmel_spi_resume);
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static const struct dev_pm_ops atmel_spi_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(atmel_spi_suspend, atmel_spi_resume)
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SET_RUNTIME_PM_OPS(atmel_spi_runtime_suspend,
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atmel_spi_runtime_resume, NULL)
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};
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#define ATMEL_SPI_PM_OPS (&atmel_spi_pm_ops)
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#else
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#define ATMEL_SPI_PM_OPS NULL
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@ -521,6 +521,17 @@ static int cdns_spi_probe(struct platform_device *pdev)
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goto clk_dis_apb;
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}
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ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs);
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if (ret < 0)
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master->num_chipselect = CDNS_SPI_DEFAULT_NUM_CS;
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else
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master->num_chipselect = num_cs;
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ret = of_property_read_u32(pdev->dev.of_node, "is-decoded-cs",
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&xspi->is_decoded_cs);
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if (ret < 0)
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xspi->is_decoded_cs = 0;
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/* SPI controller initializations */
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cdns_spi_init_hw(xspi);
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@ -539,19 +550,6 @@ static int cdns_spi_probe(struct platform_device *pdev)
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goto remove_master;
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}
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ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs);
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if (ret < 0)
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master->num_chipselect = CDNS_SPI_DEFAULT_NUM_CS;
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else
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master->num_chipselect = num_cs;
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ret = of_property_read_u32(pdev->dev.of_node, "is-decoded-cs",
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&xspi->is_decoded_cs);
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if (ret < 0)
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xspi->is_decoded_cs = 0;
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master->prepare_transfer_hardware = cdns_prepare_transfer_hardware;
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master->prepare_message = cdns_prepare_message;
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master->transfer_one = cdns_transfer_one;
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@ -26,6 +26,9 @@
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#include <linux/intel_mid_dma.h>
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#include <linux/pci.h>
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#define RX_BUSY 0
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#define TX_BUSY 1
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struct mid_dma {
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struct intel_mid_dma_slave dmas_tx;
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struct intel_mid_dma_slave dmas_rx;
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@ -98,41 +101,26 @@ static void mid_spi_dma_exit(struct dw_spi *dws)
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}
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/*
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* dws->dma_chan_done is cleared before the dma transfer starts,
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* callback for rx/tx channel will each increment it by 1.
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* Reaching 2 means the whole spi transaction is done.
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* dws->dma_chan_busy is set before the dma transfer starts, callback for tx
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* channel will clear a corresponding bit.
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*/
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static void dw_spi_dma_done(void *arg)
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static void dw_spi_dma_tx_done(void *arg)
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{
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struct dw_spi *dws = arg;
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if (++dws->dma_chan_done != 2)
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if (test_and_clear_bit(TX_BUSY, &dws->dma_chan_busy) & BIT(RX_BUSY))
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return;
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dw_spi_xfer_done(dws);
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}
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static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
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static struct dma_async_tx_descriptor *dw_spi_dma_prepare_tx(struct dw_spi *dws)
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{
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struct dma_async_tx_descriptor *txdesc, *rxdesc;
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struct dma_slave_config txconf, rxconf;
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u16 dma_ctrl = 0;
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struct dma_slave_config txconf;
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struct dma_async_tx_descriptor *txdesc;
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/* 1. setup DMA related registers */
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if (cs_change) {
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spi_enable_chip(dws, 0);
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dw_writew(dws, DW_SPI_DMARDLR, 0xf);
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dw_writew(dws, DW_SPI_DMATDLR, 0x10);
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if (dws->tx_dma)
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dma_ctrl |= SPI_DMA_TDMAE;
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if (dws->rx_dma)
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dma_ctrl |= SPI_DMA_RDMAE;
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dw_writew(dws, DW_SPI_DMACR, dma_ctrl);
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spi_enable_chip(dws, 1);
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}
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if (!dws->tx_dma)
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return NULL;
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dws->dma_chan_done = 0;
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/* 2. Prepare the TX dma transfer */
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txconf.direction = DMA_MEM_TO_DEV;
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txconf.dst_addr = dws->dma_addr;
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txconf.dst_maxburst = LNW_DMA_MSIZE_16;
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@ -151,10 +139,33 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
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1,
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DMA_MEM_TO_DEV,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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txdesc->callback = dw_spi_dma_done;
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txdesc->callback = dw_spi_dma_tx_done;
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txdesc->callback_param = dws;
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/* 3. Prepare the RX dma transfer */
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return txdesc;
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}
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/*
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* dws->dma_chan_busy is set before the dma transfer starts, callback for rx
|
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* channel will clear a corresponding bit.
|
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*/
|
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static void dw_spi_dma_rx_done(void *arg)
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{
|
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struct dw_spi *dws = arg;
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|
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if (test_and_clear_bit(RX_BUSY, &dws->dma_chan_busy) & BIT(TX_BUSY))
|
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return;
|
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dw_spi_xfer_done(dws);
|
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}
|
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|
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static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws)
|
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{
|
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struct dma_slave_config rxconf;
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struct dma_async_tx_descriptor *rxdesc;
|
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|
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if (!dws->rx_dma)
|
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return NULL;
|
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|
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rxconf.direction = DMA_DEV_TO_MEM;
|
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rxconf.src_addr = dws->dma_addr;
|
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rxconf.src_maxburst = LNW_DMA_MSIZE_16;
|
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@ -173,15 +184,56 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
|
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1,
|
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DMA_DEV_TO_MEM,
|
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
|
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rxdesc->callback = dw_spi_dma_done;
|
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rxdesc->callback = dw_spi_dma_rx_done;
|
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rxdesc->callback_param = dws;
|
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|
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/* rx must be started before tx due to spi instinct */
|
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dmaengine_submit(rxdesc);
|
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dma_async_issue_pending(dws->rxchan);
|
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return rxdesc;
|
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}
|
||||
|
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dmaengine_submit(txdesc);
|
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dma_async_issue_pending(dws->txchan);
|
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static void dw_spi_dma_setup(struct dw_spi *dws)
|
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{
|
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u16 dma_ctrl = 0;
|
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|
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spi_enable_chip(dws, 0);
|
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|
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dw_writew(dws, DW_SPI_DMARDLR, 0xf);
|
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dw_writew(dws, DW_SPI_DMATDLR, 0x10);
|
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|
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if (dws->tx_dma)
|
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dma_ctrl |= SPI_DMA_TDMAE;
|
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if (dws->rx_dma)
|
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dma_ctrl |= SPI_DMA_RDMAE;
|
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dw_writew(dws, DW_SPI_DMACR, dma_ctrl);
|
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|
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spi_enable_chip(dws, 1);
|
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}
|
||||
|
||||
static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
|
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{
|
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struct dma_async_tx_descriptor *txdesc, *rxdesc;
|
||||
|
||||
/* 1. setup DMA related registers */
|
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if (cs_change)
|
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dw_spi_dma_setup(dws);
|
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|
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/* 2. Prepare the TX dma transfer */
|
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txdesc = dw_spi_dma_prepare_tx(dws);
|
||||
|
||||
/* 3. Prepare the RX dma transfer */
|
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rxdesc = dw_spi_dma_prepare_rx(dws);
|
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|
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/* rx must be started before tx due to spi instinct */
|
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if (rxdesc) {
|
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set_bit(RX_BUSY, &dws->dma_chan_busy);
|
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dmaengine_submit(rxdesc);
|
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dma_async_issue_pending(dws->rxchan);
|
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}
|
||||
|
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if (txdesc) {
|
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set_bit(TX_BUSY, &dws->dma_chan_busy);
|
||||
dmaengine_submit(txdesc);
|
||||
dma_async_issue_pending(dws->txchan);
|
||||
}
|
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|
||||
return 0;
|
||||
}
|
||||
|
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@ -139,7 +139,7 @@ struct dw_spi {
|
||||
struct scatterlist tx_sgl;
|
||||
struct dma_chan *rxchan;
|
||||
struct scatterlist rx_sgl;
|
||||
int dma_chan_done;
|
||||
unsigned long dma_chan_busy;
|
||||
struct device *dma_dev;
|
||||
dma_addr_t dma_addr; /* phy address of the Data register */
|
||||
struct dw_spi_dma_ops *dma_ops;
|
||||
|
||||
@ -56,12 +56,15 @@ void fsl_spi_cpm_reinit_txrx(struct mpc8xxx_spi *mspi)
|
||||
qe_issue_cmd(QE_INIT_TX_RX, mspi->subblock,
|
||||
QE_CR_PROTOCOL_UNSPECIFIED, 0);
|
||||
} else {
|
||||
cpm_command(CPM_SPI_CMD, CPM_CR_INIT_TRX);
|
||||
if (mspi->flags & SPI_CPM1) {
|
||||
out_be32(&mspi->pram->rstate, 0);
|
||||
out_be16(&mspi->pram->rbptr,
|
||||
in_be16(&mspi->pram->rbase));
|
||||
out_be32(&mspi->pram->tstate, 0);
|
||||
out_be16(&mspi->pram->tbptr,
|
||||
in_be16(&mspi->pram->tbase));
|
||||
} else {
|
||||
cpm_command(CPM_SPI_CMD, CPM_CR_INIT_TRX);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user