Change to POLL api and fixes for FlexRM and OMAP driver
- Core: Prefer ACK method over POLL, if both supported - Test: use flag instead of special character - FlexRM: Usual driver internal minor churn - Omap: fix error path -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaCwXNAAoJEH/ZZH/HmD+VngMP/31lJp1uda24oBLP1gL/gH/X hU8DoKpDf/FKkHJk83d6s1l0+3Hiw40q+U9a+URAONSQsqiZ284Evw0o+bhyBC0m domLzaBW6zR6eM8lltLWdWgKW66/qzdW9jk8mHqu13hrBW5g3ATErxvf7Kj/CDTF svYGSebiEOwdGN8WlMkJBRs/o4rQ90Z9qRo4ZYfS4FYLMwUJo8oeZn5qryF02jPV 4dAxCteYUjwRze2JU/c5BTTE+5BL+yhVOQiKLQxUCdVC66nguPumbrGTGtx0jYcL NGVJP/6bN6SoyKTw/K73j7Qt7I0OFkGF7QOERh9mpwrfci/t2VkYZSrcyrjaqeDZ LUQPH2YADQJKcyh1djtlYAcYck/F4G+MThK8bH4Lh12UmHPH4Kr2AmSk8LiL4PNm 6mbhvWSdLAl7Vzr4ts3KcjT3o9w3s3PiAlLGSLg5X6rwJU/Q9SMRH/WDF7cLg8LY ZiO7zyOGp4ia6upoxgERmawyEQ2BPjgcaGHzge8TnqdJw3x958BXcFoPU6LP/osz z2KsNqg5dBLyKXSOGN+UKNbwNheQmAQ2yUTr6SXHP2HN/RopCgrnJT5DRAz5UZUe MfiRwiWYCLoI3J6pmz0WK+oN4Nst/0d3d/N+f02Zxo36FD0oMIwRYuybkuAD+4ZG JSZXbhbOep779RYCQ2m3 =3s/o -----END PGP SIGNATURE----- Merge tag 'mailbox-v4.15' of git://git.linaro.org/landing-teams/working/fujitsu/integration Pull mailbox updates from Jassi Brar: "Change to POLL api and fixes for FlexRM and OMAP driver. Summary: - Core: Prefer ACK method over POLL, if both supported - Test: use flag instead of special character - FlexRM: Usual driver internal minor churn - Omap: fix error path" * tag 'mailbox-v4.15' of git://git.linaro.org/landing-teams/working/fujitsu/integration: mailbox/omap: unregister mbox class mailbox: mailbox-test: don't rely on rx_buffer content to signal data ready mailbox: reset txdone_method TXDONE_BY_POLL if client knows_txdone mailbox: Build Broadcom FlexRM driver as loadable module for iProc SOCs mailbox: bcm-flexrm-mailbox: Use common GPL comment header mailbox: bcm-flexrm-mailbox: add depends on ARCH_BCM_IPROC mailbox: bcm-flexrm-mailbox: Print ring number in errors and warnings mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush sequence
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commit
3c18767a45
@ -163,9 +163,10 @@ config BCM_PDC_MBOX
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config BCM_FLEXRM_MBOX
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tristate "Broadcom FlexRM Mailbox"
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depends on ARM64
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depends on ARCH_BCM_IPROC || COMPILE_TEST
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depends on HAS_DMA
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select GENERIC_MSI_IRQ_DOMAIN
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default ARCH_BCM_IPROC
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default m if ARCH_BCM_IPROC
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help
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Mailbox implementation of the Broadcom FlexRM ring manager,
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which provides access to various offload engines on Broadcom
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@ -1,10 +1,18 @@
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/* Broadcom FlexRM Mailbox Driver
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*
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/*
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* Copyright (C) 2017 Broadcom
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* Broadcom FlexRM Mailbox Driver
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*
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* Each Broadcom FlexSparx4 offload engine is implemented as an
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* extension to Broadcom FlexRM ring manager. The FlexRM ring
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@ -1116,8 +1124,8 @@ static int flexrm_process_completions(struct flexrm_ring *ring)
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err = flexrm_cmpl_desc_to_error(desc);
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if (err < 0) {
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dev_warn(ring->mbox->dev,
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"got completion desc=0x%lx with error %d",
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(unsigned long)desc, err);
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"ring%d got completion desc=0x%lx with error %d\n",
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ring->num, (unsigned long)desc, err);
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}
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/* Determine request id from completion descriptor */
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@ -1127,8 +1135,8 @@ static int flexrm_process_completions(struct flexrm_ring *ring)
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msg = ring->requests[reqid];
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if (!msg) {
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dev_warn(ring->mbox->dev,
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"null msg pointer for completion desc=0x%lx",
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(unsigned long)desc);
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"ring%d null msg pointer for completion desc=0x%lx\n",
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ring->num, (unsigned long)desc);
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continue;
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}
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@ -1238,7 +1246,9 @@ static int flexrm_startup(struct mbox_chan *chan)
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ring->bd_base = dma_pool_alloc(ring->mbox->bd_pool,
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GFP_KERNEL, &ring->bd_dma_base);
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if (!ring->bd_base) {
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dev_err(ring->mbox->dev, "can't allocate BD memory\n");
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dev_err(ring->mbox->dev,
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"can't allocate BD memory for ring%d\n",
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ring->num);
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ret = -ENOMEM;
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goto fail;
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}
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@ -1261,7 +1271,9 @@ static int flexrm_startup(struct mbox_chan *chan)
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ring->cmpl_base = dma_pool_alloc(ring->mbox->cmpl_pool,
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GFP_KERNEL, &ring->cmpl_dma_base);
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if (!ring->cmpl_base) {
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dev_err(ring->mbox->dev, "can't allocate completion memory\n");
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dev_err(ring->mbox->dev,
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"can't allocate completion memory for ring%d\n",
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ring->num);
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ret = -ENOMEM;
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goto fail_free_bd_memory;
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}
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@ -1269,7 +1281,8 @@ static int flexrm_startup(struct mbox_chan *chan)
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/* Request IRQ */
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if (ring->irq == UINT_MAX) {
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dev_err(ring->mbox->dev, "ring IRQ not available\n");
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dev_err(ring->mbox->dev,
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"ring%d IRQ not available\n", ring->num);
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ret = -ENODEV;
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goto fail_free_cmpl_memory;
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}
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@ -1278,7 +1291,8 @@ static int flexrm_startup(struct mbox_chan *chan)
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flexrm_irq_thread,
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0, dev_name(ring->mbox->dev), ring);
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if (ret) {
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dev_err(ring->mbox->dev, "failed to request ring IRQ\n");
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dev_err(ring->mbox->dev,
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"failed to request ring%d IRQ\n", ring->num);
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goto fail_free_cmpl_memory;
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}
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ring->irq_requested = true;
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@ -1291,7 +1305,9 @@ static int flexrm_startup(struct mbox_chan *chan)
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&ring->irq_aff_hint);
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ret = irq_set_affinity_hint(ring->irq, &ring->irq_aff_hint);
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if (ret) {
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dev_err(ring->mbox->dev, "failed to set IRQ affinity hint\n");
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dev_err(ring->mbox->dev,
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"failed to set IRQ affinity hint for ring%d\n",
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ring->num);
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goto fail_free_irq;
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}
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@ -1365,8 +1381,8 @@ static void flexrm_shutdown(struct mbox_chan *chan)
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/* Disable/inactivate ring */
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writel_relaxed(0x0, ring->regs + RING_CONTROL);
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/* Flush ring with timeout of 1s */
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timeout = 1000;
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/* Set ring flush state */
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timeout = 1000; /* timeout of 1s */
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writel_relaxed(BIT(CONTROL_FLUSH_SHIFT),
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ring->regs + RING_CONTROL);
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do {
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@ -1374,7 +1390,23 @@ static void flexrm_shutdown(struct mbox_chan *chan)
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FLUSH_DONE_MASK)
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break;
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mdelay(1);
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} while (timeout--);
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} while (--timeout);
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if (!timeout)
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dev_err(ring->mbox->dev,
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"setting ring%d flush state timedout\n", ring->num);
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/* Clear ring flush state */
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timeout = 1000; /* timeout of 1s */
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writel_relaxed(0x0, ring + RING_CONTROL);
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do {
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if (!(readl_relaxed(ring + RING_FLUSH_DONE) &
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FLUSH_DONE_MASK))
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break;
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mdelay(1);
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} while (--timeout);
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if (!timeout)
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dev_err(ring->mbox->dev,
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"clearing ring%d flush state timedout\n", ring->num);
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/* Abort all in-flight requests */
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for (reqid = 0; reqid < RING_MAX_REQ_COUNT; reqid++) {
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@ -30,6 +30,7 @@
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#define MBOX_HEXDUMP_MAX_LEN (MBOX_HEXDUMP_LINE_LEN * \
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(MBOX_MAX_MSG_LEN / MBOX_BYTES_PER_LINE))
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static bool mbox_data_ready;
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static struct dentry *root_debugfs_dir;
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struct mbox_test_device {
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@ -152,16 +153,14 @@ out:
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static bool mbox_test_message_data_ready(struct mbox_test_device *tdev)
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{
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unsigned char data;
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bool data_ready;
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unsigned long flags;
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spin_lock_irqsave(&tdev->lock, flags);
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data = tdev->rx_buffer[0];
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data_ready = mbox_data_ready;
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spin_unlock_irqrestore(&tdev->lock, flags);
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if (data != '\0')
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return true;
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return false;
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return data_ready;
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}
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static ssize_t mbox_test_message_read(struct file *filp, char __user *userbuf,
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@ -223,6 +222,7 @@ static ssize_t mbox_test_message_read(struct file *filp, char __user *userbuf,
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*(touser + l) = '\0';
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memset(tdev->rx_buffer, 0, MBOX_MAX_MSG_LEN);
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mbox_data_ready = false;
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spin_unlock_irqrestore(&tdev->lock, flags);
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@ -292,6 +292,7 @@ static void mbox_test_receive_message(struct mbox_client *client, void *message)
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message, MBOX_MAX_MSG_LEN);
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memcpy(tdev->rx_buffer, message, MBOX_MAX_MSG_LEN);
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}
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mbox_data_ready = true;
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spin_unlock_irqrestore(&tdev->lock, flags);
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wake_up_interruptible(&tdev->waitq);
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@ -351,7 +351,7 @@ struct mbox_chan *mbox_request_channel(struct mbox_client *cl, int index)
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init_completion(&chan->tx_complete);
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if (chan->txdone_method == TXDONE_BY_POLL && cl->knows_txdone)
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chan->txdone_method |= TXDONE_BY_ACK;
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chan->txdone_method = TXDONE_BY_ACK;
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spin_unlock_irqrestore(&chan->lock, flags);
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@ -418,7 +418,7 @@ void mbox_free_channel(struct mbox_chan *chan)
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spin_lock_irqsave(&chan->lock, flags);
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chan->cl = NULL;
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chan->active_req = NULL;
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if (chan->txdone_method == (TXDONE_BY_POLL | TXDONE_BY_ACK))
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if (chan->txdone_method == TXDONE_BY_ACK)
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chan->txdone_method = TXDONE_BY_POLL;
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module_put(chan->mbox->dev->driver->owner);
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@ -906,7 +906,11 @@ static int __init omap_mbox_init(void)
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mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size,
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sizeof(mbox_msg_t));
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return platform_driver_register(&omap_mbox_driver);
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err = platform_driver_register(&omap_mbox_driver);
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if (err)
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class_unregister(&omap_mbox_class);
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return err;
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}
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subsys_initcall(omap_mbox_init);
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init_completion(&chan->tx_complete);
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if (chan->txdone_method == TXDONE_BY_POLL && cl->knows_txdone)
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chan->txdone_method |= TXDONE_BY_ACK;
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chan->txdone_method = TXDONE_BY_ACK;
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spin_unlock_irqrestore(&chan->lock, flags);
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@ -311,7 +311,7 @@ void pcc_mbox_free_channel(struct mbox_chan *chan)
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spin_lock_irqsave(&chan->lock, flags);
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chan->cl = NULL;
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chan->active_req = NULL;
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if (chan->txdone_method == (TXDONE_BY_POLL | TXDONE_BY_ACK))
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if (chan->txdone_method == TXDONE_BY_ACK)
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chan->txdone_method = TXDONE_BY_POLL;
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spin_unlock_irqrestore(&chan->lock, flags);
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