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x86: mce: Lower maximum number of banks to architecture limit

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The Intel x86 architecture right now only supports 32 machine check
banks, more would bump into other MSRs.

So lower the max define to 32.

This only affects a few bitmaps, most data structures are dynamically
sized anyways.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
Andi Kleen 2009-07-09 00:31:45 +02:00 committed by H. Peter Anvin
parent a2d32bcbc0
commit 3ccdccfadb
1 changed files with 4 additions and 3 deletions
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7
arch/x86/include/asm/mce.h
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@ -130,10 +130,11 @@ void mce_log(struct mce *m);
DECLARE_PER_CPU(struct sys_device, mce_dev); DECLARE_PER_CPU(struct sys_device, mce_dev);
/* /*
* To support more than 128 would need to escape the predefined * Maximum banks number.
* Linux defined extended banks first. * This is the limit of the current register layout on
* Intel CPUs.
*/ */
#define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1) #define MAX_NR_BANKS 32
#ifdef CONFIG_X86_MCE_INTEL #ifdef CONFIG_X86_MCE_INTEL
extern int mce_cmci_disabled; extern int mce_cmci_disabled;