rtlwifi: Change wifi.h for rtl8192se and rtl8192de
Change wifi.h for addition of RTL8192SE and RTL8192DE code Signed-off-by: Chaoming_Li <chaoming_li@realsil.com.cn> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Chaoming_Li
John W. Linville
parent
e25f51d4f9
commit
3dad618b7b
@ -640,7 +640,7 @@ static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw
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u8 txpwr_level[2] = {0, 0};
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u8 ofdm_min_index = 6, rf;
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rtlpriv->dm.txpower_trackingInit = true;
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rtlpriv->dm.txpower_trackinginit = true;
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RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
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("rtl92c_dm_txpower_tracking_callback_thermalmeter\n"));
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@ -1062,7 +1062,7 @@ static void rtl92c_dm_initialize_txpower_tracking_thermalmeter(
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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rtlpriv->dm.txpower_tracking = true;
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rtlpriv->dm.txpower_trackingInit = false;
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rtlpriv->dm.txpower_trackinginit = false;
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RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
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("pMgntInfo->txpower_tracking = %d\n",
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@ -68,6 +68,8 @@
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#define QBSS_LOAD_SIZE 5
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#define MAX_WMMELE_LENGTH 64
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#define TOTAL_CAM_ENTRY 32
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/*slot time for 11g. */
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#define RTL_SLOT_TIME_9 9
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#define RTL_SLOT_TIME_20 20
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@ -94,8 +96,10 @@
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#define CHANNEL_GROUP_MAX_5G 9
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#define CHANNEL_MAX_NUMBER_2G 14
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#define AVG_THERMAL_NUM 8
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#define MAX_TID_COUNT 9
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/* for early mode */
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#define FCS_LEN 4
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#define EM_HDR_LEN 8
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enum intf_type {
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INTF_PCI = 0,
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@ -159,6 +163,8 @@ enum hardware_type {
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(IS_HARDWARE_TYPE_8192DE(rtlhal) || IS_HARDWARE_TYPE_8192DU(rtlhal))
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#define IS_HARDWARE_TYPE_8723(rtlhal) \
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(IS_HARDWARE_TYPE_8723E(rtlhal) || IS_HARDWARE_TYPE_8723U(rtlhal))
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#define IS_HARDWARE_TYPE_8723U(rtlhal) \
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(rtlhal->hw_type == HARDWARE_TYPE_RTL8723U)
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enum scan_operation_backup_opt {
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SCAN_OPT_BACKUP = 0,
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@ -843,6 +849,7 @@ struct rtl_phy {
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bool apk_done;
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u32 reg_rf3c[2]; /* pathA / pathB */
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/* bfsync */
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u8 framesync;
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u32 framesync_c34;
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@ -852,6 +859,10 @@ struct rtl_phy {
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};
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#define MAX_TID_COUNT 9
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#define RTL_AGG_STOP 0
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#define RTL_AGG_PROGRESS 1
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#define RTL_AGG_START 2
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#define RTL_AGG_OPERATIONAL 3
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#define RTL_AGG_OFF 0
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#define RTL_AGG_ON 1
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#define RTL_AGG_EMPTYING_HW_QUEUE_ADDBA 2
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@ -871,6 +882,13 @@ struct rtl_tid_data {
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struct rtl_ht_agg agg;
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};
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struct rtl_sta_info {
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u8 ratr_index;
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u8 wireless_mode;
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u8 mimo_ps;
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struct rtl_tid_data tids[MAX_TID_COUNT];
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} __packed;
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struct rtl_priv;
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struct rtl_io {
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struct device *dev;
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@ -894,6 +912,7 @@ struct rtl_io {
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u32(*read32_sync) (struct rtl_priv *rtlpriv, u32 addr);
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int (*readN_sync) (struct rtl_priv *rtlpriv, u32 addr, u16 len,
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u8 *pdata);
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};
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struct rtl_mac {
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@ -916,6 +935,8 @@ struct rtl_mac {
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int n_channels;
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int n_bitrates;
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bool offchan_deley;
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/*filters */
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u32 rx_conf;
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u16 rx_mgt_filter;
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@ -1032,7 +1053,9 @@ struct rtl_security {
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enum rt_enc_alg pairwise_enc_algorithm;
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/*Encryption Algorithm for Brocast/Multicast */
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enum rt_enc_alg group_enc_algorithm;
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/*Cam Entry Bitmap */
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u32 hwsec_cam_bitmap;
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u8 hwsec_cam_sta_addr[TOTAL_CAM_ENTRY][ETH_ALEN];
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/*local Key buffer, indx 0 is for
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pairwise key 1-4 is for agoup key. */
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u8 key_buf[KEY_BUF_SIZE][MAX_KEY_LEN];
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@ -1053,7 +1076,7 @@ struct rtl_dm {
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bool current_turbo_edca;
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bool is_any_nonbepkts; /*out dm */
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bool is_cur_rdlstate;
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bool txpower_trackingInit;
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bool txpower_trackinginit;
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bool disable_framebursting;
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bool cck_inch14;
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bool txpower_tracking;
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@ -1079,7 +1102,6 @@ struct rtl_dm {
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bool disable_tx_int;
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char ofdm_index[2];
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char cck_index;
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u8 power_index_backup[6];
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};
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#define EFUSE_MAX_LOGICAL_SIZE 256
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@ -1175,6 +1197,7 @@ struct rtl_ps_ctl {
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* otherwise Offset[560h] = 0x00.
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* */
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bool support_aspm;
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bool support_backdoor;
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/*for LPS */
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@ -1201,7 +1224,6 @@ struct rtl_ps_ctl {
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/*just for PCIE ASPM */
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u8 const_amdpci_aspm;
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bool pwrdown_mode;
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enum rf_pwrstate inactive_pwrstate;
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@ -1282,6 +1304,10 @@ struct rt_link_detect {
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bool busytraffic;
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bool higher_busytraffic;
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bool higher_busyrxtraffic;
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u32 tidtx_in4period[MAX_TID_COUNT][4];
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u32 tidtx_inperiod[MAX_TID_COUNT];
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bool higher_busytxtraffic[MAX_TID_COUNT];
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};
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struct rtl_tcb_desc {
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@ -1344,13 +1370,26 @@ struct rtl_hal_ops {
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u32 add_msr, u32 rm_msr);
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void (*get_hw_reg) (struct ieee80211_hw *hw, u8 variable, u8 *val);
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void (*set_hw_reg) (struct ieee80211_hw *hw, u8 variable, u8 *val);
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#if 0 /* temporary */
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void (*update_rate_tbl) (struct ieee80211_hw *hw,
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struct ieee80211_sta *sta, u8 rssi_level);
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#else
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void (*update_rate_table) (struct ieee80211_hw *hw);
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#endif
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void (*update_rate_mask) (struct ieee80211_hw *hw, u8 rssi_level);
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#if 0 /* temporary */
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void (*fill_tx_desc) (struct ieee80211_hw *hw,
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struct ieee80211_hdr *hdr, u8 *pdesc_tx,
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struct ieee80211_tx_info *info,
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struct sk_buff *skb, u8 hw_queue,
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struct rtl_tcb_desc *ptcb_desc);
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#else
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void (*fill_tx_desc) (struct ieee80211_hw *hw,
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struct ieee80211_hdr *hdr, u8 *pdesc_tx,
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struct ieee80211_tx_info *info,
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struct sk_buff *skb, unsigned int queue_index);
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void (*fill_fake_txdesc) (struct ieee80211_hw *hw, u8 * pDesc,
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#endif
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void (*fill_fake_txdesc) (struct ieee80211_hw *hw, u8 *pDesc,
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u32 buffer_len, bool bIsPsPoll);
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void (*fill_tx_cmddesc) (struct ieee80211_hw *hw, u8 *pdesc,
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bool firstseg, bool lastseg,
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@ -1370,10 +1409,10 @@ struct rtl_hal_ops {
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enum led_ctl_mode ledaction);
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void (*set_desc) (u8 *pdesc, bool istx, u8 desc_name, u8 *val);
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u32 (*get_desc) (u8 *pdesc, bool istx, u8 desc_name);
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void (*tx_polling) (struct ieee80211_hw *hw, unsigned int hw_queue);
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void (*tx_polling) (struct ieee80211_hw *hw, u8 hw_queue);
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void (*enable_hw_sec) (struct ieee80211_hw *hw);
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void (*set_key) (struct ieee80211_hw *hw, u32 key_index,
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u8 *p_macaddr, bool is_group, u8 enc_algo,
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u8 *macaddr, bool is_group, u8 enc_algo,
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bool is_wepkey, bool clear_all);
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void (*init_sw_leds) (struct ieee80211_hw *hw);
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void (*deinit_sw_leds) (struct ieee80211_hw *hw);
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@ -1384,6 +1423,7 @@ struct rtl_hal_ops {
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u32 regaddr, u32 bitmask);
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void (*set_rfreg) (struct ieee80211_hw *hw, enum radio_path rfpath,
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u32 regaddr, u32 bitmask, u32 data);
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void (*linked_set_reg) (struct ieee80211_hw *hw);
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bool (*phy_rf6052_config) (struct ieee80211_hw *hw);
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void (*phy_rf6052_set_cck_txpower) (struct ieee80211_hw *hw,
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u8 *powerlevel);
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@ -1404,7 +1444,13 @@ struct rtl_intf_ops {
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int (*adapter_start) (struct ieee80211_hw *hw);
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void (*adapter_stop) (struct ieee80211_hw *hw);
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#if 0 /* temporary */
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int (*adapter_tx) (struct ieee80211_hw *hw, struct sk_buff *skb,
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struct rtl_tcb_desc *ptcb_desc);
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#else
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int (*adapter_tx) (struct ieee80211_hw *hw, struct sk_buff *skb);
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#endif
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void (*flush)(struct ieee80211_hw *hw, bool drop);
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int (*reset_trx_ring) (struct ieee80211_hw *hw);
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bool (*waitq_insert) (struct ieee80211_hw *hw, struct sk_buff *skb);
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@ -1418,6 +1464,15 @@ struct rtl_intf_ops {
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struct rtl_mod_params {
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/* default: 0 = using hardware encryption */
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int sw_crypto;
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/* default: 1 = using no linked power save */
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bool inactiveps;
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/* default: 1 = using linked sw power save */
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bool swctrl_lps;
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/* default: 1 = using linked fw power save */
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bool fwctrl_lps;
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};
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struct rtl_hal_usbint_cfg {
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@ -1445,6 +1500,7 @@ struct rtl_hal_usbint_cfg {
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struct rtl_hal_cfg {
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u8 bar_id;
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bool write_readback;
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char *name;
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char *fw_name;
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struct rtl_hal_ops *ops;
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@ -1469,7 +1525,6 @@ struct rtl_locks {
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spinlock_t rf_lock;
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spinlock_t lps_lock;
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spinlock_t waitq_lock;
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spinlock_t tx_urb_lock;
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/*Dual mac*/
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spinlock_t cck_and_rw_pagea_lock;
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@ -1653,13 +1708,23 @@ struct bt_coexist_info {
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#define EF4BYTE(_val) \
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(le32_to_cpu(_val))
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/* Read data from memory */
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#define READEF1BYTE(_ptr) \
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EF1BYTE(*((u8 *)(_ptr)))
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/* Read le16 data from memory and convert to host ordering */
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#define READEF2BYTE(_ptr) \
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EF2BYTE(*((u16 *)(_ptr)))
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#define READEF4BYTE(_ptr) \
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EF4BYTE(*((u32 *)(_ptr)))
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/* Write data to memory */
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#define WRITEEF1BYTE(_ptr, _val) \
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(*((u8 *)(_ptr))) = EF1BYTE(_val)
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/* Write le16 data to memory in host ordering */
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#define WRITEEF2BYTE(_ptr, _val) \
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(*((u16 *)(_ptr))) = EF2BYTE(_val)
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#define WRITEEF4BYTE(_ptr, _val) \
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(*((u16 *)(_ptr))) = EF2BYTE(_val)
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/* Create a bit mask
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* Examples:
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@ -1698,6 +1763,25 @@ struct bt_coexist_info {
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#define LE_P1BYTE_TO_HOST_1BYTE(__pstart) \
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(EF1BYTE(*((u8 *)(__pstart))))
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/*Description:
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Translate subfield (continuous bits in little-endian) of 4-byte
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value to host byte ordering.*/
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#define LE_BITS_TO_4BYTE(__pstart, __bitoffset, __bitlen) \
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( \
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(LE_P4BYTE_TO_HOST_4BYTE(__pstart) >> (__bitoffset)) & \
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BIT_LEN_MASK_32(__bitlen) \
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)
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#define LE_BITS_TO_2BYTE(__pstart, __bitoffset, __bitlen) \
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( \
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(LE_P2BYTE_TO_HOST_2BYTE(__pstart) >> (__bitoffset)) & \
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BIT_LEN_MASK_16(__bitlen) \
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)
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#define LE_BITS_TO_1BYTE(__pstart, __bitoffset, __bitlen) \
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( \
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(LE_P1BYTE_TO_HOST_1BYTE(__pstart) >> (__bitoffset)) & \
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BIT_LEN_MASK_8(__bitlen) \
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)
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/* Description:
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* Mask subfield (continuous bits in little-endian) of 4-byte value
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* and return the result in 4-byte value in host byte ordering.
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@ -1721,6 +1805,18 @@ struct bt_coexist_info {
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/* Description:
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* Set subfield of little-endian 4-byte value to specified value.
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*/
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#define SET_BITS_TO_LE_4BYTE(__pstart, __bitoffset, __bitlen, __val) \
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*((u32 *)(__pstart)) = EF4BYTE \
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( \
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LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) | \
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((((u32)__val) & BIT_LEN_MASK_32(__bitlen)) << (__bitoffset)) \
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);
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#define SET_BITS_TO_LE_2BYTE(__pstart, __bitoffset, __bitlen, __val) \
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*((u16 *)(__pstart)) = EF2BYTE \
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( \
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LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) | \
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((((u16)__val) & BIT_LEN_MASK_16(__bitlen)) << (__bitoffset)) \
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);
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#define SET_BITS_TO_LE_1BYTE(__pstart, __bitoffset, __bitlen, __val) \
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*((u8 *)(__pstart)) = EF1BYTE \
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( \
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@ -1728,12 +1824,16 @@ struct bt_coexist_info {
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((((u8)__val) & BIT_LEN_MASK_8(__bitlen)) << (__bitoffset)) \
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);
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#define N_BYTE_ALIGMENT(__value, __aligment) ((__aligment == 1) ? \
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(__value) : (((__value + __aligment - 1) / __aligment) * __aligment))
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/****************************************
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mem access macro define end
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****************************************/
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#define byte(x, n) ((x >> (8 * n)) & 0xff)
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#define packet_get_type(_packet) (EF1BYTE((_packet).octet[0]) & 0xFC)
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#define RTL_WATCH_DOG_TIME 2000
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#define MSECS(t) msecs_to_jiffies(t)
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#define WLAN_FC_GET_VERS(fc) (le16_to_cpu(fc) & IEEE80211_FCTL_VERS)
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@ -1768,6 +1868,15 @@ struct bt_coexist_info {
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#define container_of_dwork_rtl(x, y, z) \
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container_of(container_of(x, struct delayed_work, work), y, z)
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#define FILL_OCTET_STRING(_os, _octet, _len) \
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(_os).octet = (u8 *)(_octet); \
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(_os).length = (_len);
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#define CP_MACADDR(des, src) \
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((des)[0] = (src)[0], (des)[1] = (src)[1],\
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(des)[2] = (src)[2], (des)[3] = (src)[3],\
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(des)[4] = (src)[4], (des)[5] = (src)[5])
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static inline u8 rtl_read_byte(struct rtl_priv *rtlpriv, u32 addr)
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{
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return rtlpriv->io.read8_sync(rtlpriv, addr);
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@ -1786,17 +1895,26 @@ static inline u32 rtl_read_dword(struct rtl_priv *rtlpriv, u32 addr)
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static inline void rtl_write_byte(struct rtl_priv *rtlpriv, u32 addr, u8 val8)
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{
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rtlpriv->io.write8_async(rtlpriv, addr, val8);
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if (rtlpriv->cfg->write_readback)
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rtlpriv->io.read8_sync(rtlpriv, addr);
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}
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static inline void rtl_write_word(struct rtl_priv *rtlpriv, u32 addr, u16 val16)
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{
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rtlpriv->io.write16_async(rtlpriv, addr, val16);
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if (rtlpriv->cfg->write_readback)
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rtlpriv->io.read16_sync(rtlpriv, addr);
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}
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static inline void rtl_write_dword(struct rtl_priv *rtlpriv,
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u32 addr, u32 val32)
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{
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rtlpriv->io.write32_async(rtlpriv, addr, val32);
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if (rtlpriv->cfg->write_readback)
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rtlpriv->io.read32_sync(rtlpriv, addr);
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}
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static inline u32 rtl_get_bbreg(struct ieee80211_hw *hw,
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@ -1855,4 +1973,31 @@ static inline u8 get_rf_type(struct rtl_phy *rtlphy)
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return rtlphy->rf_type;
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}
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static inline struct ieee80211_hdr *rtl_get_hdr(struct sk_buff *skb)
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{
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return (struct ieee80211_hdr *)(skb->data);
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}
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static inline u16 rtl_get_fc(struct sk_buff *skb)
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{
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return le16_to_cpu(rtl_get_hdr(skb)->frame_control);
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}
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static inline u16 rtl_get_tid_h(struct ieee80211_hdr *hdr)
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{
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return (ieee80211_get_qos_ctl(hdr))[0] & IEEE80211_QOS_CTL_TID_MASK;
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}
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static inline u16 rtl_get_tid(struct sk_buff *skb)
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{
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return rtl_get_tid_h(rtl_get_hdr(skb));
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}
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static inline struct ieee80211_sta *get_sta(struct ieee80211_hw *hw,
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struct ieee80211_vif *vif,
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u8 *bssid)
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{
|
||||
return ieee80211_find_sta(vif, bssid);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user