drm/amdgpu/pm: add documentation for pp_od_clock_voltage for vangogh
Vangogh follows other APUs, but also allows core clock adjustments. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -743,6 +743,15 @@ static ssize_t amdgpu_set_pp_table(struct device *dev,
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*
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* - a list of valid ranges for sclk labeled OD_RANGE
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*
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* < For VanGogh >
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*
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* Reading the file will display:
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*
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* - minimum and maximum engine clock labeled OD_SCLK
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* - minimum and maximum core clocks labeled OD_CCLK
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*
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* - a list of valid ranges for sclk and cclk labeled OD_RANGE
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*
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* To manually adjust these settings:
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*
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* - First select manual using power_dpm_force_performance_level
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@ -751,7 +760,10 @@ static ssize_t amdgpu_set_pp_table(struct device *dev,
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* string that contains "s/m index clock" to the file. The index
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* should be 0 if to set minimum clock. And 1 if to set maximum
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* clock. E.g., "s 0 500" will update minimum sclk to be 500 MHz.
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* "m 1 800" will update maximum mclk to be 800Mhz.
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* "m 1 800" will update maximum mclk to be 800Mhz. For core
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* clocks on VanGogh, the string contains "p core index clock".
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* E.g., "p 2 0 800" would set the minimum core clock on core
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* 2 to 800Mhz.
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*
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* For sclk voltage curve, enter the new values by writing a
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* string that contains "vc point clock voltage" to the file. The
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