Revert "drm/amd/display: Initialize writeback connector"
This reverts commit a2830b9e852f4007f7ee53f2c5765ab07ddb55e2. [WHY & HOW] The writeback series cause a regression in thunderbolt display. Signed-off-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Hung
Alex Deucher
parent
7f5504021e
commit
3dcb661715
@ -37,8 +37,7 @@ AMDGPUDM = \
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amdgpu_dm_helpers.o \
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amdgpu_dm_pp_smu.o \
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amdgpu_dm_psr.o \
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amdgpu_dm_replay.o \
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amdgpu_dm_wb.o
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amdgpu_dm_replay.o
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ifdef CONFIG_DRM_AMD_DC_FP
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AMDGPUDM += dc_fpu.o
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@ -54,7 +54,6 @@
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#include "amdgpu_dm_crtc.h"
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#include "amdgpu_dm_hdcp.h"
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#include <drm/display/drm_hdcp_helper.h>
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#include "amdgpu_dm_wb.h"
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#include "amdgpu_pm.h"
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#include "amdgpu_atombios.h"
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@ -4472,25 +4471,8 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
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link = dc_get_link_at_index(dm->dc, i);
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if (link->connector_signal == SIGNAL_TYPE_VIRTUAL) {
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struct drm_writeback_connector *wbcon = kzalloc(sizeof(*wbcon), GFP_KERNEL);
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if (!wbcon) {
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DRM_ERROR("KMS: Failed to allocate writeback connector\n");
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continue;
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}
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if (amdgpu_dm_wb_connector_init(dm, wbcon)) {
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DRM_ERROR("KMS: Failed to initialize writeback connector\n");
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kfree(wbcon);
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continue;
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}
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link->psr_settings.psr_feature_enabled = false;
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link->psr_settings.psr_version = DC_PSR_VERSION_UNSUPPORTED;
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if (link->connector_signal == SIGNAL_TYPE_VIRTUAL)
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continue;
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}
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aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
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if (!aconnector)
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@ -1,209 +0,0 @@
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// SPDX-License-Identifier: MIT
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/*
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* Copyright 2022 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "dm_services_types.h"
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#include "amdgpu.h"
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#include "amdgpu_dm.h"
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#include "amdgpu_dm_wb.h"
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#include "amdgpu_display.h"
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#include <drm/drm_atomic_state_helper.h>
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#include <drm/drm_modeset_helper_vtables.h>
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static const u32 amdgpu_dm_wb_formats[] = {
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DRM_FORMAT_XRGB2101010,
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};
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static int amdgpu_dm_wb_encoder_atomic_check(struct drm_encoder *encoder,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state)
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{
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struct drm_framebuffer *fb;
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const struct drm_display_mode *mode = &crtc_state->mode;
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bool found = false;
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uint8_t i;
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if (!conn_state->writeback_job || !conn_state->writeback_job->fb)
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return 0;
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fb = conn_state->writeback_job->fb;
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if (fb->width != mode->hdisplay || fb->height != mode->vdisplay) {
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DRM_DEBUG_KMS("Invalid framebuffer size %ux%u\n",
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fb->width, fb->height);
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return -EINVAL;
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}
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for (i = 0; i < sizeof(amdgpu_dm_wb_formats) / sizeof(u32); i++) {
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if (fb->format->format == amdgpu_dm_wb_formats[i])
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found = true;
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}
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if (!found) {
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DRM_DEBUG_KMS("Invalid pixel format %p4cc\n",
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&fb->format->format);
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return -EINVAL;
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}
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return 0;
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}
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static int amdgpu_dm_wb_connector_get_modes(struct drm_connector *connector)
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{
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struct drm_device *dev = connector->dev;
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return drm_add_modes_noedid(connector, dev->mode_config.max_width,
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dev->mode_config.max_height);
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}
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static int amdgpu_dm_wb_prepare_job(struct drm_writeback_connector *wb_connector,
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struct drm_writeback_job *job)
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{
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struct amdgpu_framebuffer *afb;
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struct drm_gem_object *obj;
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struct amdgpu_device *adev;
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struct amdgpu_bo *rbo;
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uint32_t domain;
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int r;
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if (!job->fb) {
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DRM_DEBUG_KMS("No FB bound\n");
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return 0;
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}
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afb = to_amdgpu_framebuffer(job->fb);
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obj = job->fb->obj[0];
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rbo = gem_to_amdgpu_bo(obj);
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adev = amdgpu_ttm_adev(rbo->tbo.bdev);
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r = amdgpu_bo_reserve(rbo, true);
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if (r) {
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dev_err(adev->dev, "fail to reserve bo (%d)\n", r);
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return r;
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}
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r = dma_resv_reserve_fences(rbo->tbo.base.resv, 1);
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if (r) {
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dev_err(adev->dev, "reserving fence slot failed (%d)\n", r);
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goto error_unlock;
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}
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domain = amdgpu_display_supported_domains(adev, rbo->flags);
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r = amdgpu_bo_pin(rbo, domain);
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if (unlikely(r != 0)) {
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if (r != -ERESTARTSYS)
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DRM_ERROR("Failed to pin framebuffer with error %d\n", r);
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goto error_unlock;
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}
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r = amdgpu_ttm_alloc_gart(&rbo->tbo);
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if (unlikely(r != 0)) {
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DRM_ERROR("%p bind failed\n", rbo);
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goto error_unpin;
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}
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amdgpu_bo_unreserve(rbo);
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afb->address = amdgpu_bo_gpu_offset(rbo);
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amdgpu_bo_ref(rbo);
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return 0;
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error_unpin:
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amdgpu_bo_unpin(rbo);
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error_unlock:
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amdgpu_bo_unreserve(rbo);
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return r;
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}
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static void amdgpu_dm_wb_cleanup_job(struct drm_writeback_connector *connector,
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struct drm_writeback_job *job)
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{
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struct amdgpu_bo *rbo;
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int r;
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if (!job->fb)
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return;
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rbo = gem_to_amdgpu_bo(job->fb->obj[0]);
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r = amdgpu_bo_reserve(rbo, false);
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if (unlikely(r)) {
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DRM_ERROR("failed to reserve rbo before unpin\n");
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return;
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}
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amdgpu_bo_unpin(rbo);
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amdgpu_bo_unreserve(rbo);
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amdgpu_bo_unref(&rbo);
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}
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static const struct drm_encoder_helper_funcs amdgpu_dm_wb_encoder_helper_funcs = {
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.atomic_check = amdgpu_dm_wb_encoder_atomic_check,
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};
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static const struct drm_connector_funcs amdgpu_dm_wb_connector_funcs = {
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.fill_modes = drm_helper_probe_single_connector_modes,
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.destroy = drm_connector_cleanup,
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.reset = amdgpu_dm_connector_funcs_reset,
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.atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static const struct drm_connector_helper_funcs amdgpu_dm_wb_conn_helper_funcs = {
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.get_modes = amdgpu_dm_wb_connector_get_modes,
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.prepare_writeback_job = amdgpu_dm_wb_prepare_job,
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.cleanup_writeback_job = amdgpu_dm_wb_cleanup_job,
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};
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int amdgpu_dm_wb_connector_init(struct amdgpu_display_manager *dm,
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struct drm_writeback_connector *wbcon)
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{
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int res = 0;
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drm_connector_helper_add(&wbcon->base, &amdgpu_dm_wb_conn_helper_funcs);
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res = drm_writeback_connector_init(&dm->adev->ddev, wbcon,
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&amdgpu_dm_wb_connector_funcs,
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&amdgpu_dm_wb_encoder_helper_funcs,
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amdgpu_dm_wb_formats,
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ARRAY_SIZE(amdgpu_dm_wb_formats),
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amdgpu_dm_get_encoder_crtc_mask(dm->adev));
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if (res)
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return res;
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/*
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* Some of the properties below require access to state, like bpc.
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* Allocate some default initial connector state with our reset helper.
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*/
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if (wbcon->base.funcs->reset)
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wbcon->base.funcs->reset(&wbcon->base);
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return 0;
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}
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@ -1,35 +0,0 @@
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/* SPDX-License-Identifier: MIT */
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/*
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* Copyright 2022 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __AMDGPU_DM_WB_H__
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#define __AMDGPU_DM_WB_H__
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#include <drm/drm_writeback.h>
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int amdgpu_dm_wb_connector_init(struct amdgpu_display_manager *dm,
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struct drm_writeback_connector *wbcon);
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#endif
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