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mvebu dt64 for 6.2 (part 1)

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Update cache properties for various Marvell SoCs
 Reserved memory for optee firmware
 Turris Mox (Armada 3720 based Socs)
  - Define slot-power-limit-milliwatt for PCIe
  - Add missing interrupt for RTC
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Merge tag 'mvebu-dt64-6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt

mvebu dt64 for 6.2 (part 1)

Update cache properties for various Marvell SoCs
Reserved memory for optee firmware
Turris Mox (Armada 3720 based Socs)
 - Define slot-power-limit-milliwatt for PCIe
 - Add missing interrupt for RTC

* tag 'mvebu-dt64-6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: marvell: add optee FW definitions
  arm64: dts: Update cache properties for marvell
  arm64: dts: armada-3720-turris-mox: Add missing interrupt for RTC
  arm64: dts: armada-3720-turris-mox: Define slot-power-limit-milliwatt for PCIe

Link: https://lore.kernel.org/r/87fse39aer.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-11-30 15:06:00 +01:00
commit 3deeb5b079
7 changed files with 20 additions and 0 deletions
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1
arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
View File

@ -49,6 +49,7 @@
l2: l2-cache {
compatible = "cache";
cache-level = <2>;
};
};

4
arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
View File

@ -125,9 +125,12 @@
/delete-property/ mrvl,i2c-fast-mode;
status = "okay";
/* MCP7940MT-I/MNY RTC */
rtc@6f {
compatible = "microchip,mcp7940x";
reg = <0x6f>;
interrupt-parent = <&gpiosb>;
interrupts = <5 0>; /* GPIO2_5 */
};
};
@ -136,6 +139,7 @@
pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
status = "okay";
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
slot-power-limit-milliwatt = <10000>;
/*
* U-Boot port for Turris Mox has a bug which always expects that "ranges" DT property
* contains exactly 2 ranges with 3 (child) address cells, 2 (parent) address cells and

5
arch/arm64/boot/dts/marvell/armada-37xx.dtsi
View File

@ -35,6 +35,11 @@
reg = <0 0x4000000 0 0x200000>;
no-map;
};
tee@4400000 {
reg = <0 0x4400000 0 0x1000000>;
no-map;
};
};
cpus {

1
arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
View File

@ -51,6 +51,7 @@
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
};
};

2
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
View File

@ -81,6 +81,7 @@
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
};
l2_1: l2-cache1 {
@ -88,6 +89,7 @@
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
};
};
};

2
arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
View File

@ -81,6 +81,7 @@
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
};
l2_1: l2-cache1 {
@ -88,6 +89,7 @@
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
};
};
};

5
arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
View File

@ -41,6 +41,11 @@
reg = <0x0 0x4000000 0x0 0x200000>;
no-map;
};
tee@4400000 {
reg = <0 0x4400000 0 0x1000000>;
no-map;
};
};
AP_NAME {