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arm64: dts: apple: Add CPU topology & cpufreq nodes for t8103

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Add the missing CPU topology/capacity information and the cpufreq nodes,
so we can have CPU frequency scaling and the scheduler has the
information it needs to make the correct decisions.

Boost states are commented out, as they are not yet available (that
requires CPU deep sleep support, to be eventually done via PSCI).
The driver supports them fine; the hardware will just refuse to ever
go into them at this time, so don't expose them to users until that's
done.

Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
This commit is contained in:
Hector Martin 2022-05-03 00:08:56 +09:00
parent d1a8368d66
commit 3e895a6460
1 changed files with 194 additions and 10 deletions
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204
arch/arm64/boot/dts/apple/t8103.dtsi
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@ -22,71 +22,243 @@
#address-cells = <2>; #address-cells = <2>;
#size-cells = <0>; #size-cells = <0>;
cpu0: cpu@0 { cpu-map {
cluster0 {
core0 {
cpu = <&cpu_e0>;
};
core1 {
cpu = <&cpu_e1>;
};
core2 {
cpu = <&cpu_e2>;
};
core3 {
cpu = <&cpu_e3>;
};
};
cluster1 {
core0 {
cpu = <&cpu_p0>;
};
core1 {
cpu = <&cpu_p1>;
};
core2 {
cpu = <&cpu_p2>;
};
core3 {
cpu = <&cpu_p3>;
};
};
};
cpu_e0: cpu@0 {
compatible = "apple,icestorm"; compatible = "apple,icestorm";
device_type = "cpu"; device_type = "cpu";
reg = <0x0 0x0>; reg = <0x0 0x0>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */ cpu-release-addr = <0 0>; /* To be filled by loader */
operating-points-v2 = <&ecluster_opp>;
capacity-dmips-mhz = <714>;
performance-domains = <&cpufreq_e>;
}; };
cpu1: cpu@1 { cpu_e1: cpu@1 {
compatible = "apple,icestorm"; compatible = "apple,icestorm";
device_type = "cpu"; device_type = "cpu";
reg = <0x0 0x1>; reg = <0x0 0x1>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */ cpu-release-addr = <0 0>; /* To be filled by loader */
operating-points-v2 = <&ecluster_opp>;
capacity-dmips-mhz = <714>;
performance-domains = <&cpufreq_e>;
}; };
cpu2: cpu@2 { cpu_e2: cpu@2 {
compatible = "apple,icestorm"; compatible = "apple,icestorm";
device_type = "cpu"; device_type = "cpu";
reg = <0x0 0x2>; reg = <0x0 0x2>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */ cpu-release-addr = <0 0>; /* To be filled by loader */
operating-points-v2 = <&ecluster_opp>;
capacity-dmips-mhz = <714>;
performance-domains = <&cpufreq_e>;
}; };
cpu3: cpu@3 { cpu_e3: cpu@3 {
compatible = "apple,icestorm"; compatible = "apple,icestorm";
device_type = "cpu"; device_type = "cpu";
reg = <0x0 0x3>; reg = <0x0 0x3>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */ cpu-release-addr = <0 0>; /* To be filled by loader */
operating-points-v2 = <&ecluster_opp>;
capacity-dmips-mhz = <714>;
performance-domains = <&cpufreq_e>;
}; };
cpu4: cpu@10100 { cpu_p0: cpu@10100 {
compatible = "apple,firestorm"; compatible = "apple,firestorm";
device_type = "cpu"; device_type = "cpu";
reg = <0x0 0x10100>; reg = <0x0 0x10100>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */ cpu-release-addr = <0 0>; /* To be filled by loader */
operating-points-v2 = <&pcluster_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p>;
}; };
cpu5: cpu@10101 { cpu_p1: cpu@10101 {
compatible = "apple,firestorm"; compatible = "apple,firestorm";
device_type = "cpu"; device_type = "cpu";
reg = <0x0 0x10101>; reg = <0x0 0x10101>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */ cpu-release-addr = <0 0>; /* To be filled by loader */
operating-points-v2 = <&pcluster_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p>;
}; };
cpu6: cpu@10102 { cpu_p2: cpu@10102 {
compatible = "apple,firestorm"; compatible = "apple,firestorm";
device_type = "cpu"; device_type = "cpu";
reg = <0x0 0x10102>; reg = <0x0 0x10102>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */ cpu-release-addr = <0 0>; /* To be filled by loader */
operating-points-v2 = <&pcluster_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p>;
}; };
cpu7: cpu@10103 { cpu_p3: cpu@10103 {
compatible = "apple,firestorm"; compatible = "apple,firestorm";
device_type = "cpu"; device_type = "cpu";
reg = <0x0 0x10103>; reg = <0x0 0x10103>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */ cpu-release-addr = <0 0>; /* To be filled by loader */
operating-points-v2 = <&pcluster_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p>;
}; };
}; };
ecluster_opp: opp-table-0 {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <1>;
clock-latency-ns = <7500>;
};
opp02 {
opp-hz = /bits/ 64 <972000000>;
opp-level = <2>;
clock-latency-ns = <22000>;
};
opp03 {
opp-hz = /bits/ 64 <1332000000>;
opp-level = <3>;
clock-latency-ns = <27000>;
};
opp04 {
opp-hz = /bits/ 64 <1704000000>;
opp-level = <4>;
clock-latency-ns = <33000>;
};
opp05 {
opp-hz = /bits/ 64 <2064000000>;
opp-level = <5>;
clock-latency-ns = <50000>;
};
};
pcluster_opp: opp-table-1 {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <1>;
clock-latency-ns = <8000>;
};
opp02 {
opp-hz = /bits/ 64 <828000000>;
opp-level = <2>;
clock-latency-ns = <19000>;
};
opp03 {
opp-hz = /bits/ 64 <1056000000>;
opp-level = <3>;
clock-latency-ns = <21000>;
};
opp04 {
opp-hz = /bits/ 64 <1284000000>;
opp-level = <4>;
clock-latency-ns = <23000>;
};
opp05 {
opp-hz = /bits/ 64 <1500000000>;
opp-level = <5>;
clock-latency-ns = <24000>;
};
opp06 {
opp-hz = /bits/ 64 <1728000000>;
opp-level = <6>;
clock-latency-ns = <29000>;
};
opp07 {
opp-hz = /bits/ 64 <1956000000>;
opp-level = <7>;
clock-latency-ns = <31000>;
};
opp08 {
opp-hz = /bits/ 64 <2184000000>;
opp-level = <8>;
clock-latency-ns = <34000>;
};
opp09 {
opp-hz = /bits/ 64 <2388000000>;
opp-level = <9>;
clock-latency-ns = <36000>;
};
opp10 {
opp-hz = /bits/ 64 <2592000000>;
opp-level = <10>;
clock-latency-ns = <51000>;
};
opp11 {
opp-hz = /bits/ 64 <2772000000>;
opp-level = <11>;
clock-latency-ns = <54000>;
};
opp12 {
opp-hz = /bits/ 64 <2988000000>;
opp-level = <12>;
clock-latency-ns = <55000>;
};
#if 0
/* Not available until CPU deep sleep is implemented */
opp13 {
opp-hz = /bits/ 64 <3096000000>;
opp-level = <13>;
clock-latency-ns = <55000>;
turbo-mode;
};
opp14 {
opp-hz = /bits/ 64 <3144000000>;
opp-level = <14>;
clock-latency-ns = <56000>;
turbo-mode;
};
opp15 {
opp-hz = /bits/ 64 <3204000000>;
opp-level = <15>;
clock-latency-ns = <56000>;
turbo-mode;
};
#endif
};
timer { timer {
compatible = "arm,armv8-timer"; compatible = "arm,armv8-timer";
interrupt-parent = <&aic>; interrupt-parent = <&aic>;
@ -134,6 +306,18 @@
ranges; ranges;
nonposted-mmio; nonposted-mmio;
cpufreq_e: performance-controller@210e20000 {
compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
reg = <0x2 0x10e20000 0 0x1000>;
#performance-domain-cells = <0>;
};
cpufreq_p: performance-controller@211e20000 {
compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
reg = <0x2 0x11e20000 0 0x1000>;
#performance-domain-cells = <0>;
};
dart_sio: iommu@235004000 { dart_sio: iommu@235004000 {
compatible = "apple,t8103-dart"; compatible = "apple,t8103-dart";
reg = <0x2 0x35004000 0x0 0x4000>; reg = <0x2 0x35004000 0x0 0x4000>;
@ -303,12 +487,12 @@
affinities { affinities {
e-core-pmu-affinity { e-core-pmu-affinity {
apple,fiq-index = <AIC_CPU_PMU_E>; apple,fiq-index = <AIC_CPU_PMU_E>;
cpus = <&cpu0 &cpu1 &cpu2 &cpu3>; cpus = <&cpu_e0 &cpu_e1 &cpu_e2 &cpu_e3>;
}; };
p-core-pmu-affinity { p-core-pmu-affinity {
apple,fiq-index = <AIC_CPU_PMU_P>; apple,fiq-index = <AIC_CPU_PMU_P>;
cpus = <&cpu4 &cpu5 &cpu6 &cpu7>; cpus = <&cpu_p0 &cpu_p1 &cpu_p2 &cpu_p3>;
}; };
}; };
}; };