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net/mlx5: Add source e-switch owner

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The source e-switch owner allows a vport on one e-switch port be associated
with a rule defined on the second port e-switch.

The role of the source eswitch owner valid bit in the flow group is to
allow the firmware fail driver attempts to wild card the source eswitch
match field. If this bit is not set, the firmware ignores the source
eswitch owner field totally.

Signed-off-by: Shahar Klein <shahark@mellanox.com>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Reviewed-by: Roi Dayan <roid@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
This commit is contained in:
Shahar Klein 2018-03-18 09:02:06 +02:00 committed by Saeed Mahameed
parent 56e858df9f
commit 3e99df8772
2 changed files with 14 additions and 2 deletions
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10
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
View File

@ -1372,6 +1372,8 @@ static int create_auto_flow_group(struct mlx5_flow_table *ft,
struct mlx5_core_dev *dev = get_dev(&ft->node);
int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
void *match_criteria_addr;
u8 src_esw_owner_mask_on;
void *misc;
int err;
u32 *in;
@ -1384,6 +1386,14 @@ static int create_auto_flow_group(struct mlx5_flow_table *ft,
MLX5_SET(create_flow_group_in, in, start_flow_index, fg->start_index);
MLX5_SET(create_flow_group_in, in, end_flow_index, fg->start_index +
fg->max_ftes - 1);
misc = MLX5_ADDR_OF(fte_match_param, fg->mask.match_criteria,
misc_parameters);
src_esw_owner_mask_on = !!MLX5_GET(fte_match_set_misc, misc,
source_eswitch_owner_vhca_id);
MLX5_SET(create_flow_group_in, in,
source_eswitch_owner_vhca_id_valid, src_esw_owner_mask_on);
match_criteria_addr = MLX5_ADDR_OF(create_flow_group_in,
in, match_criteria);
memcpy(match_criteria_addr, fg->mask.match_criteria,

6
include/linux/mlx5/mlx5_ifc.h
View File

@ -412,7 +412,7 @@ struct mlx5_ifc_fte_match_set_misc_bits {
u8 reserved_at_0[0x8];
u8 source_sqn[0x18];
u8 reserved_at_20[0x10];
u8 source_eswitch_owner_vhca_id[0x10];
u8 source_port[0x10];
u8 outer_second_prio[0x3];
@ -6995,7 +6995,9 @@ struct mlx5_ifc_create_flow_group_in_bits {
u8 reserved_at_a0[0x8];
u8 table_id[0x18];
u8 reserved_at_c0[0x20];
u8 source_eswitch_owner_vhca_id_valid[0x1];
u8 reserved_at_c1[0x1f];
u8 start_flow_index[0x20];