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Merge branch 'net-ipa-miscellaneous-cleanups'

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Alex Elder says:

====================
net: ipa: miscellaneous cleanups

This series contains some minor cleanups I've been meaning to get
around to for a while.  The first few remove the definitions of some
currently-unused symbols.  Several fix some warnings that are reported
when the build is done with "W=2".  All are simple and have no effect
on the operation of the code.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2020-09-28 18:34:56 -07:00
commit 3f53094ded
7 changed files with 34 additions and 100 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/net/ipa/gsi.c
View File

@ -254,8 +254,8 @@ static void gsi_irq_enable(struct gsi *gsi)
/* We don't use inter-EE channel or event interrupts */
val = GSI_CNTXT_TYPE_IRQ_MSK_ALL;
val &= ~MSK_INTER_EE_CH_CTRL_FMASK;
val &= ~MSK_INTER_EE_EV_CTRL_FMASK;
val &= ~INTER_EE_CH_CTRL_FMASK;
val &= ~INTER_EE_EV_CTRL_FMASK;
iowrite32(val, gsi->virt + GSI_CNTXT_TYPE_IRQ_MSK_OFFSET);
val = GENMASK(gsi->channel_count - 1, 0);
@ -271,7 +271,7 @@ static void gsi_irq_enable(struct gsi *gsi)
iowrite32(val, gsi->virt + GSI_CNTXT_GLOB_IRQ_EN_OFFSET);
/* Never enable GSI_BREAK_POINT */
val = GSI_CNTXT_GSI_IRQ_ALL & ~EN_BREAK_POINT_FMASK;
val = GSI_CNTXT_GSI_IRQ_ALL & ~BREAK_POINT_FMASK;
iowrite32(val, gsi->virt + GSI_CNTXT_GSI_IRQ_EN_OFFSET);
}
@ -1074,8 +1074,8 @@ static void gsi_isr_glob_ee(struct gsi *gsi)
val &= ~ERROR_INT_FMASK;
if (val & EN_GP_INT1_FMASK) {
val ^= EN_GP_INT1_FMASK;
if (val & GP_INT1_FMASK) {
val ^= GP_INT1_FMASK;
gsi_isr_gp_int1(gsi);
}
@ -1600,7 +1600,7 @@ err_unwind_modem:
/* Compute which modem channels need to be deallocated */
mask ^= gsi->modem_channel_bitmap;
while (mask) {
u32 channel_id = __fls(mask);
channel_id = __fls(mask);
mask ^= BIT(channel_id);
@ -1628,7 +1628,7 @@ static void gsi_channel_teardown(struct gsi *gsi)
mutex_lock(&gsi->mutex);
while (mask) {
u32 channel_id = __fls(mask);
channel_id = __fls(mask);
mask ^= BIT(channel_id);
@ -1972,7 +1972,6 @@ int gsi_init(struct gsi *gsi, struct platform_device *pdev, bool prefetch,
*/
init_dummy_netdev(&gsi->dummy_dev);
/* Get the GSI IRQ and request for it to wake the system */
ret = platform_get_irq_byname(pdev, "gsi");
if (ret <= 0) {
dev_err(dev, "DT error %d getting \"gsi\" IRQ property\n", ret);

59
drivers/net/ipa/gsi_reg.h
View File

@ -258,6 +258,11 @@
GSI_EE_N_CNTXT_TYPE_IRQ_OFFSET(GSI_EE_AP)
#define GSI_EE_N_CNTXT_TYPE_IRQ_OFFSET(ee) \
(0x0001f080 + 0x4000 * (ee))
#define GSI_CNTXT_TYPE_IRQ_MSK_OFFSET \
GSI_EE_N_CNTXT_TYPE_IRQ_MSK_OFFSET(GSI_EE_AP)
#define GSI_EE_N_CNTXT_TYPE_IRQ_MSK_OFFSET(ee) \
(0x0001f088 + 0x4000 * (ee))
/* The masks below are used for the TYPE_IRQ and TYPE_IRQ_MASK registers */
#define CH_CTRL_FMASK GENMASK(0, 0)
#define EV_CTRL_FMASK GENMASK(1, 1)
#define GLOB_EE_FMASK GENMASK(2, 2)
@ -265,18 +270,6 @@
#define INTER_EE_CH_CTRL_FMASK GENMASK(4, 4)
#define INTER_EE_EV_CTRL_FMASK GENMASK(5, 5)
#define GENERAL_FMASK GENMASK(6, 6)
#define GSI_CNTXT_TYPE_IRQ_MSK_OFFSET \
GSI_EE_N_CNTXT_TYPE_IRQ_MSK_OFFSET(GSI_EE_AP)
#define GSI_EE_N_CNTXT_TYPE_IRQ_MSK_OFFSET(ee) \
(0x0001f088 + 0x4000 * (ee))
#define MSK_CH_CTRL_FMASK GENMASK(0, 0)
#define MSK_EV_CTRL_FMASK GENMASK(1, 1)
#define MSK_GLOB_EE_FMASK GENMASK(2, 2)
#define MSK_IEOB_FMASK GENMASK(3, 3)
#define MSK_INTER_EE_CH_CTRL_FMASK GENMASK(4, 4)
#define MSK_INTER_EE_EV_CTRL_FMASK GENMASK(5, 5)
#define MSK_GENERAL_FMASK GENMASK(6, 6)
#define GSI_CNTXT_TYPE_IRQ_MSK_ALL GENMASK(6, 0)
#define GSI_CNTXT_SRC_CH_IRQ_OFFSET \
@ -328,57 +321,39 @@
GSI_EE_N_CNTXT_GLOB_IRQ_STTS_OFFSET(GSI_EE_AP)
#define GSI_EE_N_CNTXT_GLOB_IRQ_STTS_OFFSET(ee) \
(0x0001f100 + 0x4000 * (ee))
#define ERROR_INT_FMASK GENMASK(0, 0)
#define GP_INT1_FMASK GENMASK(1, 1)
#define GP_INT2_FMASK GENMASK(2, 2)
#define GP_INT3_FMASK GENMASK(3, 3)
#define GSI_CNTXT_GLOB_IRQ_EN_OFFSET \
GSI_EE_N_CNTXT_GLOB_IRQ_EN_OFFSET(GSI_EE_AP)
#define GSI_EE_N_CNTXT_GLOB_IRQ_EN_OFFSET(ee) \
(0x0001f108 + 0x4000 * (ee))
#define EN_ERROR_INT_FMASK GENMASK(0, 0)
#define EN_GP_INT1_FMASK GENMASK(1, 1)
#define EN_GP_INT2_FMASK GENMASK(2, 2)
#define EN_GP_INT3_FMASK GENMASK(3, 3)
#define GSI_CNTXT_GLOB_IRQ_ALL GENMASK(3, 0)
#define GSI_CNTXT_GLOB_IRQ_CLR_OFFSET \
GSI_EE_N_CNTXT_GLOB_IRQ_CLR_OFFSET(GSI_EE_AP)
#define GSI_EE_N_CNTXT_GLOB_IRQ_CLR_OFFSET(ee) \
(0x0001f110 + 0x4000 * (ee))
#define CLR_ERROR_INT_FMASK GENMASK(0, 0)
#define CLR_GP_INT1_FMASK GENMASK(1, 1)
#define CLR_GP_INT2_FMASK GENMASK(2, 2)
#define CLR_GP_INT3_FMASK GENMASK(3, 3)
/* The masks below are used for the general IRQ STTS, EN, and CLR registers */
#define ERROR_INT_FMASK GENMASK(0, 0)
#define GP_INT1_FMASK GENMASK(1, 1)
#define GP_INT2_FMASK GENMASK(2, 2)
#define GP_INT3_FMASK GENMASK(3, 3)
#define GSI_CNTXT_GLOB_IRQ_ALL GENMASK(3, 0)
#define GSI_CNTXT_GSI_IRQ_STTS_OFFSET \
GSI_EE_N_CNTXT_GSI_IRQ_STTS_OFFSET(GSI_EE_AP)
#define GSI_EE_N_CNTXT_GSI_IRQ_STTS_OFFSET(ee) \
(0x0001f118 + 0x4000 * (ee))
#define BREAK_POINT_FMASK GENMASK(0, 0)
#define BUS_ERROR_FMASK GENMASK(1, 1)
#define CMD_FIFO_OVRFLOW_FMASK GENMASK(2, 2)
#define MCS_STACK_OVRFLOW_FMASK GENMASK(3, 3)
#define GSI_CNTXT_GSI_IRQ_EN_OFFSET \
GSI_EE_N_CNTXT_GSI_IRQ_EN_OFFSET(GSI_EE_AP)
#define GSI_EE_N_CNTXT_GSI_IRQ_EN_OFFSET(ee) \
(0x0001f120 + 0x4000 * (ee))
#define EN_BREAK_POINT_FMASK GENMASK(0, 0)
#define EN_BUS_ERROR_FMASK GENMASK(1, 1)
#define EN_CMD_FIFO_OVRFLOW_FMASK GENMASK(2, 2)
#define EN_MCS_STACK_OVRFLOW_FMASK GENMASK(3, 3)
#define GSI_CNTXT_GSI_IRQ_ALL GENMASK(3, 0)
#define GSI_CNTXT_GSI_IRQ_CLR_OFFSET \
GSI_EE_N_CNTXT_GSI_IRQ_CLR_OFFSET(GSI_EE_AP)
#define GSI_EE_N_CNTXT_GSI_IRQ_CLR_OFFSET(ee) \
(0x0001f128 + 0x4000 * (ee))
#define CLR_BREAK_POINT_FMASK GENMASK(0, 0)
#define CLR_BUS_ERROR_FMASK GENMASK(1, 1)
#define CLR_CMD_FIFO_OVRFLOW_FMASK GENMASK(2, 2)
#define CLR_MCS_STACK_OVRFLOW_FMASK GENMASK(3, 3)
/* The masks below are used for the general IRQ STTS, EN, and CLR registers */
#define BREAK_POINT_FMASK GENMASK(0, 0)
#define BUS_ERROR_FMASK GENMASK(1, 1)
#define CMD_FIFO_OVRFLOW_FMASK GENMASK(2, 2)
#define MCS_STACK_OVRFLOW_FMASK GENMASK(3, 3)
#define GSI_CNTXT_GSI_IRQ_ALL GENMASK(3, 0)
#define GSI_CNTXT_INTSET_OFFSET \
GSI_EE_N_CNTXT_INTSET_OFFSET(GSI_EE_AP)

1
drivers/net/ipa/gsi_trans.c
View File

@ -81,7 +81,6 @@ struct gsi_tre {
/* gsi_tre->flags mask values (in CPU byte order) */
#define TRE_FLAGS_CHAIN_FMASK GENMASK(0, 0)
#define TRE_FLAGS_IEOB_FMASK GENMASK(8, 8)
#define TRE_FLAGS_IEOT_FMASK GENMASK(9, 9)
#define TRE_FLAGS_BEI_FMASK GENMASK(10, 10)
#define TRE_FLAGS_TYPE_FMASK GENMASK(23, 16)

47
drivers/net/ipa/ipa_endpoint.c
View File

@ -42,11 +42,8 @@
/** enum ipa_status_opcode - status element opcode hardware values */
enum ipa_status_opcode {
IPA_STATUS_OPCODE_PACKET = 0x01,
IPA_STATUS_OPCODE_NEW_FRAG_RULE = 0x02,
IPA_STATUS_OPCODE_DROPPED_PACKET = 0x04,
IPA_STATUS_OPCODE_SUSPENDED_PACKET = 0x08,
IPA_STATUS_OPCODE_LOG = 0x10,
IPA_STATUS_OPCODE_DCMP = 0x20,
IPA_STATUS_OPCODE_PACKET_2ND_PASS = 0x40,
};
@ -54,13 +51,6 @@ enum ipa_status_opcode {
enum ipa_status_exception {
/* 0 means no exception */
IPA_STATUS_EXCEPTION_DEAGGR = 0x01,
IPA_STATUS_EXCEPTION_IPTYPE = 0x04,
IPA_STATUS_EXCEPTION_PACKET_LENGTH = 0x08,
IPA_STATUS_EXCEPTION_FRAG_RULE_MISS = 0x10,
IPA_STATUS_EXCEPTION_SW_FILT = 0x20,
/* The meaning of the next value depends on whether the IP version */
IPA_STATUS_EXCEPTION_NAT = 0x40, /* IPv4 */
IPA_STATUS_EXCEPTION_IPV6CT = IPA_STATUS_EXCEPTION_NAT,
};
/* Status element provided by hardware */
@ -79,36 +69,9 @@ struct ipa_status {
};
/* Field masks for struct ipa_status structure fields */
#define IPA_STATUS_SRC_IDX_FMASK GENMASK(4, 0)
#define IPA_STATUS_DST_IDX_FMASK GENMASK(4, 0)
#define IPA_STATUS_FLAGS1_FLT_LOCAL_FMASK GENMASK(0, 0)
#define IPA_STATUS_FLAGS1_FLT_HASH_FMASK GENMASK(1, 1)
#define IPA_STATUS_FLAGS1_FLT_GLOBAL_FMASK GENMASK(2, 2)
#define IPA_STATUS_FLAGS1_FLT_RET_HDR_FMASK GENMASK(3, 3)
#define IPA_STATUS_FLAGS1_FLT_RULE_ID_FMASK GENMASK(13, 4)
#define IPA_STATUS_FLAGS1_RT_LOCAL_FMASK GENMASK(14, 14)
#define IPA_STATUS_FLAGS1_RT_HASH_FMASK GENMASK(15, 15)
#define IPA_STATUS_FLAGS1_UCP_FMASK GENMASK(16, 16)
#define IPA_STATUS_FLAGS1_RT_TBL_IDX_FMASK GENMASK(21, 17)
#define IPA_STATUS_FLAGS1_RT_RULE_ID_FMASK GENMASK(31, 22)
#define IPA_STATUS_FLAGS2_NAT_HIT_FMASK GENMASK_ULL(0, 0)
#define IPA_STATUS_FLAGS2_NAT_ENTRY_IDX_FMASK GENMASK_ULL(13, 1)
#define IPA_STATUS_FLAGS2_NAT_TYPE_FMASK GENMASK_ULL(15, 14)
#define IPA_STATUS_FLAGS2_TAG_INFO_FMASK GENMASK_ULL(63, 16)
#define IPA_STATUS_FLAGS3_SEQ_NUM_FMASK GENMASK(7, 0)
#define IPA_STATUS_FLAGS3_TOD_CTR_FMASK GENMASK(31, 8)
#define IPA_STATUS_FLAGS4_HDR_LOCAL_FMASK GENMASK(0, 0)
#define IPA_STATUS_FLAGS4_HDR_OFFSET_FMASK GENMASK(10, 1)
#define IPA_STATUS_FLAGS4_FRAG_HIT_FMASK GENMASK(11, 11)
#define IPA_STATUS_FLAGS4_FRAG_RULE_FMASK GENMASK(15, 12)
#define IPA_STATUS_FLAGS4_HW_SPECIFIC_FMASK GENMASK(31, 16)
#ifdef IPA_VALIDATE
static void ipa_endpoint_validate_build(void)
@ -1048,8 +1011,7 @@ static bool ipa_endpoint_skb_build(struct ipa_endpoint *endpoint,
}
/* The format of a packet status element is the same for several status
* types (opcodes). The NEW_FRAG_RULE, LOG, DCMP (decompression) types
* aren't currently supported
* types (opcodes). Other types aren't currently supported.
*/
static bool ipa_status_format_packet(enum ipa_status_opcode opcode)
{
@ -1086,7 +1048,7 @@ static bool ipa_status_drop_packet(const struct ipa_status *status)
{
u32 val;
/* Deaggregation exceptions we drop; others we consume */
/* Deaggregation exceptions we drop; all other types we consume */
if (status->exception)
return status->exception == IPA_STATUS_EXCEPTION_DEAGGR;
@ -1432,11 +1394,10 @@ void ipa_endpoint_suspend_one(struct ipa_endpoint *endpoint)
if (!(endpoint->ipa->enabled & BIT(endpoint->endpoint_id)))
return;
if (!endpoint->toward_ipa)
if (!endpoint->toward_ipa) {
ipa_endpoint_replenish_disable(endpoint);
if (!endpoint->toward_ipa)
(void)ipa_endpoint_program_suspend(endpoint, true);
}
/* IPA v3.5.1 doesn't use channel stop for suspend */
stop_channel = endpoint->ipa->version != IPA_VERSION_3_5_1;

8
drivers/net/ipa/ipa_main.c
View File

@ -723,8 +723,8 @@ static int ipa_probe(struct platform_device *pdev)
bool modem_alloc;
bool modem_init;
struct ipa *ipa;
phandle phandle;
bool prefetch;
phandle ph;
int ret;
ipa_validate_build();
@ -736,13 +736,13 @@ static int ipa_probe(struct platform_device *pdev)
return -EPROBE_DEFER;
/* We rely on remoteproc to tell us about modem state changes */
phandle = of_property_read_phandle(dev->of_node, "modem-remoteproc");
if (!phandle) {
ph = of_property_read_phandle(dev->of_node, "modem-remoteproc");
if (!ph) {
dev_err(dev, "DT missing \"modem-remoteproc\" property\n");
return -EINVAL;
}
rproc = rproc_get_by_phandle(phandle);
rproc = rproc_get_by_phandle(ph);
if (!rproc)
return -EPROBE_DEFER;

2
drivers/net/ipa/ipa_reg.h
View File

@ -426,7 +426,7 @@ enum ipa_cs_offload_en {
IPA_CS_RSVD
};
/** enum ipa_aggr_en - aggregation type field in ENDP_INIT_AGGR_N */
/** enum ipa_aggr_en - aggregation enable field in ENDP_INIT_AGGR_N */
enum ipa_aggr_en {
IPA_BYPASS_AGGR = 0,
IPA_ENABLE_AGGR = 1,

2
drivers/net/ipa/ipa_uc.c
View File

@ -144,7 +144,7 @@ static void ipa_uc_response_hdlr(struct ipa *ipa, enum ipa_irq_id irq_id)
* should only receive responses from the microcontroller when it has
* sent it a request message.
*
* We can drop the clock reference taken in ipa_uc_init() once we
* We can drop the clock reference taken in ipa_uc_setup() once we
* know the microcontroller has finished its initialization.
*/
switch (shared->response) {