Merge branch 'fixes' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine fixes from Vinod Koul: "A few fixes on slave dmanengine. There are trivial fixes in imx-dma, tegra-dma & ioat driver" * 'fixes' of git://git.infradead.org/users/vkoul/slave-dma: dma: tegra: implement flags parameters for cyclic transfer dmaengine: imx-dma: Disable use of hw_chain to fix sg_dma transfers. ioat: Fix DMA memory sync direction correct flag
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commit
3f58e0945e
@ -684,9 +684,8 @@ static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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break;
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}
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imxdmac->hw_chaining = 1;
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if (!imxdma_hw_chain(imxdmac))
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return -EINVAL;
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imxdmac->hw_chaining = 0;
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imxdmac->ccr_from_device = (mode | IMX_DMA_TYPE_FIFO) |
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((IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) << 2) |
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CCR_REN;
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@ -951,7 +951,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
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goto free_resources;
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}
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}
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dma_sync_single_for_device(dev, dest_dma, PAGE_SIZE, DMA_TO_DEVICE);
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dma_sync_single_for_device(dev, dest_dma, PAGE_SIZE, DMA_FROM_DEVICE);
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/* skip validate if the capability is not present */
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if (!dma_has_cap(DMA_XOR_VAL, dma_chan->device->cap_mask))
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@ -266,6 +266,7 @@ static struct tegra_dma_desc *tegra_dma_desc_get(
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if (async_tx_test_ack(&dma_desc->txd)) {
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list_del(&dma_desc->node);
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spin_unlock_irqrestore(&tdc->lock, flags);
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dma_desc->txd.flags = 0;
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return dma_desc;
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}
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}
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@ -1050,7 +1051,9 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
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TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT;
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ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32;
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csr |= TEGRA_APBDMA_CSR_FLOW | TEGRA_APBDMA_CSR_IE_EOC;
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csr |= TEGRA_APBDMA_CSR_FLOW;
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if (flags & DMA_PREP_INTERRUPT)
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csr |= TEGRA_APBDMA_CSR_IE_EOC;
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csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
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apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1;
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@ -1095,7 +1098,8 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
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mem += len;
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}
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sg_req->last_sg = true;
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dma_desc->txd.flags = 0;
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if (flags & DMA_CTRL_ACK)
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dma_desc->txd.flags = DMA_CTRL_ACK;
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/*
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* Make sure that mode should not be conflicting with currently
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