Renesas ARM Based SoC Simple PM Bus Updates for v4.1
* Add Simple Power-Managed Bus Driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJU7rsuAAoJENfPZGlqN0++EFkQAKotEsCrlImurqBuiVyt5Sxc cMd8loc5mJBegpDkLR/xJTr9gKFDy/ekHLWxK8+r1ZlMpsg8cEV5YZF05b0k/kfU DOFLLvUHXu8dpGL2FQHXV2FtDB0dmCguUW5a//njnTaDvTfu0H7lkrU+ZFMVVeme htA4gAOaZTC/hFRE9acV4qQk6yazZIXD7QajLWIDQVvyCm9homc0J881xu8G5FTc vTc9GWBbiNfhlyVhTmXMKxb13LOXfiHlM8GRj0kZue3TxwgFAk4hXr3ObxWHw40s n31q7OJMMUbc7ZcuiKMpDvIy8mdlmDHNpT5fyuNGeDzQnVwRj8GgMNsi/rPV+CVu aNuyNsWZ+aONVO1Kb0z9mZnNAUKyvuUlw+E9GtssnfQF8mwvJsqtErf1i6X4H/80 ofjhM/plbCbMIFPSv8dkTOUbFRaRGRDJPa+JCeFzpOK/zby3mFfc3gcsPQ2bYh+0 /5BKel6Tbf1rrrsycDRF+EcuZn4Fav3GRrmQEjMitu3IUWojfSGj0N+JzGsd+fGM yHkvy+bynoWYblcGtVypNnbPqAoZiV9o939M43g6BBaYXzdtBlyXNWjMVwCaPzC1 j6TqflqznVZ4K8GHek9fFMrfcHLZfqgo6kWmdUriz7GXt8IdYO/XNEpRTUQ21iUb 1DoOdDUcrDRQpsB4Altv =BzF2 -----END PGP SIGNATURE----- Merge tag 'renesas-simple-pm-bus-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers Pull "Renesas ARM Based SoC Simple PM Bus Updates for v4.1" from Simon Horman: * Add Simple Power-Managed Bus Driver * tag 'renesas-simple-pm-bus-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: drivers: bus: Add Simple Power-Managed Bus Driver drivers: bus: Add Renesas Bus State Controller (BSC) DT Bindings drivers: bus: Add Simple Power-Managed Bus DT Bindings drivers: bus: Sort Makefile entries alphabetically drivers: bus: Sort Kconfig entries alphabetically
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46
Documentation/devicetree/bindings/bus/renesas,bsc.txt
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Documentation/devicetree/bindings/bus/renesas,bsc.txt
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Renesas Bus State Controller (BSC)
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==================================
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The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
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Bridge", or "External Bus Interface") can be found in several Renesas ARM SoCs.
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It provides an external bus for connecting multiple external devices to the
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SoC, driving several chip select lines, for e.g. NOR FLASH, Ethernet and USB.
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While the BSC is a fairly simple memory-mapped bus, it may be part of a PM
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domain, and may have a gateable functional clock.
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Before a device connected to the BSC can be accessed, the PM domain
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containing the BSC must be powered on, and the functional clock
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driving the BSC must be enabled.
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The bindings for the BSC extend the bindings for "simple-pm-bus".
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Required properties
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- compatible: Must contain an SoC-specific value, and "renesas,bsc" and
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"simple-pm-bus" as fallbacks.
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SoC-specific values can be:
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"renesas,bsc-r8a73a4" for R-Mobile APE6 (r8a73a4)
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"renesas,bsc-sh73a0" for SH-Mobile AG5 (sh73a0)
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- #address-cells, #size-cells, ranges: Must describe the mapping between
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parent address and child address spaces.
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- reg: Must contain the base address and length to access the bus controller.
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Optional properties:
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- interrupts: Must contain a reference to the BSC interrupt, if available.
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- clocks: Must contain a reference to the functional clock, if available.
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- power-domains: Must contain a reference to the PM domain, if available.
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Example:
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bsc: bus@fec10000 {
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compatible = "renesas,bsc-sh73a0", "renesas,bsc",
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"simple-pm-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0x20000000>;
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reg = <0xfec10000 0x400>;
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interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&zb_clk>;
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power-domains = <&pd_a4s>;
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};
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44
Documentation/devicetree/bindings/bus/simple-pm-bus.txt
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Documentation/devicetree/bindings/bus/simple-pm-bus.txt
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Simple Power-Managed Bus
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========================
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A Simple Power-Managed Bus is a transparent bus that doesn't need a real
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driver, as it's typically initialized by the boot loader.
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However, its bus controller is part of a PM domain, or under the control of a
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functional clock. Hence, the bus controller's PM domain and/or clock must be
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enabled for child devices connected to the bus (either on-SoC or externally)
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to function.
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While "simple-pm-bus" follows the "simple-bus" set of properties, as specified
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in ePAPR, it is not an extension of "simple-bus".
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Required properties:
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- compatible: Must contain at least "simple-pm-bus".
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Must not contain "simple-bus".
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It's recommended to let this be preceded by one or more
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vendor-specific compatible values.
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- #address-cells, #size-cells, ranges: Must describe the mapping between
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parent address and child address spaces.
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Optional platform-specific properties for clock or PM domain control (at least
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one of them is required):
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- clocks: Must contain a reference to the functional clock(s),
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- power-domains: Must contain a reference to the PM domain.
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Please refer to the binding documentation for the clock and/or PM domain
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providers for more details.
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Example:
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bsc: bus@fec10000 {
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compatible = "renesas,bsc-sh73a0", "renesas,bsc",
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"simple-pm-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0x20000000>;
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reg = <0xfec10000 0x400>;
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interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&zb_clk>;
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power-domains = <&pd_a4s>;
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};
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@ -4,6 +4,21 @@
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menu "Bus devices"
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config ARM_CCI
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bool "ARM CCI driver support"
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depends on ARM && OF && CPU_V7
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help
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Driver supporting the CCI cache coherent interconnect for ARM
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platforms.
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config ARM_CCN
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bool "ARM CCN driver support"
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depends on ARM || ARM64
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depends on PERF_EVENTS
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help
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PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
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interconnect.
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config BRCMSTB_GISB_ARB
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bool "Broadcom STB GISB bus arbiter"
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depends on ARM || MIPS
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@ -27,6 +42,13 @@ config MVEBU_MBUS
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Driver needed for the MBus configuration on Marvell EBU SoCs
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(Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
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config OMAP_INTERCONNECT
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tristate "OMAP INTERCONNECT DRIVER"
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depends on ARCH_OMAP2PLUS
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help
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Driver to enable OMAP interconnect error handling driver.
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config OMAP_OCP2SCP
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tristate "OMAP OCP2SCP DRIVER"
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depends on ARCH_OMAP2PLUS
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@ -36,27 +58,18 @@ config OMAP_OCP2SCP
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OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
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OCP2SCP.
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config OMAP_INTERCONNECT
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tristate "OMAP INTERCONNECT DRIVER"
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depends on ARCH_OMAP2PLUS
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config SIMPLE_PM_BUS
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bool "Simple Power-Managed Bus Driver"
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depends on OF && PM
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depends on ARCH_SHMOBILE || COMPILE_TEST
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help
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Driver to enable OMAP interconnect error handling driver.
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config ARM_CCI
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bool "ARM CCI driver support"
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depends on ARM && OF && CPU_V7
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help
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Driver supporting the CCI cache coherent interconnect for ARM
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platforms.
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config ARM_CCN
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bool "ARM CCN driver support"
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depends on ARM || ARM64
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depends on PERF_EVENTS
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help
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PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
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interconnect.
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Driver for transparent busses that don't need a real driver, but
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where the bus controller is part of a PM domain, or under the control
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of a functional clock, and thus relies on runtime PM for managing
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this PM domain and/or clock.
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An example of such a bus controller is the Renesas Bus State
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Controller (BSC, sometimes called "LBSC within Bus Bridge", or
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"External Bus Interface") as found on several Renesas ARM SoCs.
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config VEXPRESS_CONFIG
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bool "Versatile Express configuration bus"
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@ -2,16 +2,17 @@
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# Makefile for the bus drivers.
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#
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obj-$(CONFIG_BRCMSTB_GISB_ARB) += brcmstb_gisb.o
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obj-$(CONFIG_IMX_WEIM) += imx-weim.o
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obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o
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obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
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# Interconnect bus driver for OMAP SoCs.
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obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o
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# Interconnect bus drivers for ARM platforms
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obj-$(CONFIG_ARM_CCI) += arm-cci.o
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obj-$(CONFIG_ARM_CCN) += arm-ccn.o
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obj-$(CONFIG_BRCMSTB_GISB_ARB) += brcmstb_gisb.o
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obj-$(CONFIG_IMX_WEIM) += imx-weim.o
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obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o
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# Interconnect bus driver for OMAP SoCs.
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obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o
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obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
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obj-$(CONFIG_SIMPLE_PM_BUS) += simple-pm-bus.o
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obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress-config.o
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drivers/bus/simple-pm-bus.c
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drivers/bus/simple-pm-bus.c
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/*
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* Simple Power-Managed Bus Driver
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*
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* Copyright (C) 2014-2015 Glider bvba
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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static int simple_pm_bus_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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dev_dbg(&pdev->dev, "%s\n", __func__);
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pm_runtime_enable(&pdev->dev);
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if (np)
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of_platform_populate(np, NULL, NULL, &pdev->dev);
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return 0;
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}
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static int simple_pm_bus_remove(struct platform_device *pdev)
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{
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dev_dbg(&pdev->dev, "%s\n", __func__);
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pm_runtime_disable(&pdev->dev);
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return 0;
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}
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static const struct of_device_id simple_pm_bus_of_match[] = {
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{ .compatible = "simple-pm-bus", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, simple_pm_bus_of_match);
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static struct platform_driver simple_pm_bus_driver = {
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.probe = simple_pm_bus_probe,
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.remove = simple_pm_bus_remove,
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.driver = {
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.name = "simple-pm-bus",
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.of_match_table = simple_pm_bus_of_match,
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},
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};
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module_platform_driver(simple_pm_bus_driver);
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MODULE_DESCRIPTION("Simple Power-Managed Bus Driver");
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MODULE_AUTHOR("Geert Uytterhoeven <geert+renesas@glider.be>");
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MODULE_LICENSE("GPL v2");
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