x86/insn: perf tools: Add new SHA instructions
Intel SHA Extensions are explained in the Intel Architecture Instruction Set Extensions Programing Reference (Oct 2014). There are 7 new instructions. Add them to the op code map and the perf tools new instructions test. e.g. $ tools/perf/perf test "x86 ins" 39: Test x86 instruction decoder - new instructions : Ok Or to see the details: $ tools/perf/perf test -v "x86 ins" 2>&1 | grep sha Committer note: 3 lines of details, for the curious: $ perf test -v "x86 ins" 2>&1 | grep sha256msg1 | tail -3 Decoded ok: 0f 38 cc 84 08 78 56 34 12 sha256msg1 0x12345678(%rax,%rcx,1),%xmm0 Decoded ok: 0f 38 cc 84 c8 78 56 34 12 sha256msg1 0x12345678(%rax,%rcx,8),%xmm0 Decoded ok: 44 0f 38 cc bc c8 78 56 34 12 sha256msg1 0x12345678(%rax,%rcx,8),%xmm15 $ Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Qiaowei Ren <qiaowei.ren@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1441196131-20632-5-git-send-email-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -736,6 +736,12 @@ bd: vfnmadd231ss/d Vx,Hx,Wx (66),(v),(v1)
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be: vfnmsub231ps/d Vx,Hx,Wx (66),(v)
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bf: vfnmsub231ss/d Vx,Hx,Wx (66),(v),(v1)
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# 0x0f 0x38 0xc0-0xff
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c8: sha1nexte Vdq,Wdq
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c9: sha1msg1 Vdq,Wdq
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ca: sha1msg2 Vdq,Wdq
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cb: sha256rnds2 Vdq,Wdq
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cc: sha256msg1 Vdq,Wdq
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cd: sha256msg2 Vdq,Wdq
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db: VAESIMC Vdq,Wdq (66),(v1)
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dc: VAESENC Vdq,Hdq,Wdq (66),(v1)
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dd: VAESENCLAST Vdq,Hdq,Wdq (66),(v1)
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@ -794,6 +800,7 @@ AVXcode: 3
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61: vpcmpestri Vdq,Wdq,Ib (66),(v1)
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62: vpcmpistrm Vdq,Wdq,Ib (66),(v1)
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63: vpcmpistri Vdq,Wdq,Ib (66),(v1)
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cc: sha1rnds4 Vdq,Wdq,Ib
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df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
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f0: RORX Gy,Ey,Ib (F2),(v)
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EndTable
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@ -322,3 +322,297 @@
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"f2 ff 21 \tbnd jmp *(%ecx)",},
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
{{0x0f, 0x38, 0xcd, 0x44, 0x05, 0x12, }, 6, 0, "", "",
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||||
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||||
{{0x0f, 0x38, 0xcd, 0x44, 0x08, 0x12, }, 6, 0, "", "",
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||||
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||||
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||||
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||||
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||||
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|
||||
{{0x0f, 0x38, 0xcd, 0x85, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
{{0x0f, 0x38, 0xcd, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
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|
||||
{{0x0f, 0x38, 0xcd, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
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||||
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|
||||
|
@ -338,3 +338,367 @@
|
||||
"67 f2 ff 21 \tbnd jmpq *(%ecx)",},
|
||||
{{0xf2, 0x0f, 0x85, 0x00, 0x00, 0x00, 0x00, }, 7, 0, "jcc", "conditional",
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||||
"f2 0f 85 00 00 00 00 \tbnd jne 413 <main+0x413>",},
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
"0f 38 cc c1 \tsha256msg1 %xmm1,%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0xd7, }, 4, 0, "", "",
|
||||
"0f 38 cc d7 \tsha256msg1 %xmm7,%xmm2",},
|
||||
{{0x41, 0x0f, 0x38, 0xcc, 0xc0, }, 5, 0, "", "",
|
||||
"41 0f 38 cc c0 \tsha256msg1 %xmm8,%xmm0",},
|
||||
{{0x44, 0x0f, 0x38, 0xcc, 0xc7, }, 5, 0, "", "",
|
||||
"44 0f 38 cc c7 \tsha256msg1 %xmm7,%xmm8",},
|
||||
{{0x45, 0x0f, 0x38, 0xcc, 0xc7, }, 5, 0, "", "",
|
||||
"45 0f 38 cc c7 \tsha256msg1 %xmm15,%xmm8",},
|
||||
{{0x0f, 0x38, 0xcc, 0x00, }, 4, 0, "", "",
|
||||
"0f 38 cc 00 \tsha256msg1 (%rax),%xmm0",},
|
||||
{{0x41, 0x0f, 0x38, 0xcc, 0x00, }, 5, 0, "", "",
|
||||
"41 0f 38 cc 00 \tsha256msg1 (%r8),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x04, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cc 04 25 78 56 34 12 \tsha256msg1 0x12345678,%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x18, }, 4, 0, "", "",
|
||||
"0f 38 cc 18 \tsha256msg1 (%rax),%xmm3",},
|
||||
{{0x0f, 0x38, 0xcc, 0x04, 0x01, }, 5, 0, "", "",
|
||||
"0f 38 cc 04 01 \tsha256msg1 (%rcx,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cc 04 05 78 56 34 12 \tsha256msg1 0x12345678(,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x04, 0x08, }, 5, 0, "", "",
|
||||
"0f 38 cc 04 08 \tsha256msg1 (%rax,%rcx,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x04, 0xc8, }, 5, 0, "", "",
|
||||
"0f 38 cc 04 c8 \tsha256msg1 (%rax,%rcx,8),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x40, 0x12, }, 5, 0, "", "",
|
||||
"0f 38 cc 40 12 \tsha256msg1 0x12(%rax),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x45, 0x12, }, 5, 0, "", "",
|
||||
"0f 38 cc 45 12 \tsha256msg1 0x12(%rbp),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x44, 0x01, 0x12, }, 6, 0, "", "",
|
||||
"0f 38 cc 44 01 12 \tsha256msg1 0x12(%rcx,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x44, 0x05, 0x12, }, 6, 0, "", "",
|
||||
"0f 38 cc 44 05 12 \tsha256msg1 0x12(%rbp,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x44, 0x08, 0x12, }, 6, 0, "", "",
|
||||
"0f 38 cc 44 08 12 \tsha256msg1 0x12(%rax,%rcx,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x44, 0xc8, 0x12, }, 6, 0, "", "",
|
||||
"0f 38 cc 44 c8 12 \tsha256msg1 0x12(%rax,%rcx,8),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x80, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
|
||||
"0f 38 cc 80 78 56 34 12 \tsha256msg1 0x12345678(%rax),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x85, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
|
||||
"0f 38 cc 85 78 56 34 12 \tsha256msg1 0x12345678(%rbp),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cc 84 01 78 56 34 12 \tsha256msg1 0x12345678(%rcx,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cc 84 05 78 56 34 12 \tsha256msg1 0x12345678(%rbp,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cc 84 08 78 56 34 12 \tsha256msg1 0x12345678(%rax,%rcx,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcc, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cc 84 c8 78 56 34 12 \tsha256msg1 0x12345678(%rax,%rcx,8),%xmm0",},
|
||||
{{0x44, 0x0f, 0x38, 0xcc, 0xbc, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
|
||||
"44 0f 38 cc bc c8 78 56 34 12 \tsha256msg1 0x12345678(%rax,%rcx,8),%xmm15",},
|
||||
{{0x0f, 0x38, 0xcd, 0xc1, }, 4, 0, "", "",
|
||||
"0f 38 cd c1 \tsha256msg2 %xmm1,%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0xd7, }, 4, 0, "", "",
|
||||
"0f 38 cd d7 \tsha256msg2 %xmm7,%xmm2",},
|
||||
{{0x41, 0x0f, 0x38, 0xcd, 0xc0, }, 5, 0, "", "",
|
||||
"41 0f 38 cd c0 \tsha256msg2 %xmm8,%xmm0",},
|
||||
{{0x44, 0x0f, 0x38, 0xcd, 0xc7, }, 5, 0, "", "",
|
||||
"44 0f 38 cd c7 \tsha256msg2 %xmm7,%xmm8",},
|
||||
{{0x45, 0x0f, 0x38, 0xcd, 0xc7, }, 5, 0, "", "",
|
||||
"45 0f 38 cd c7 \tsha256msg2 %xmm15,%xmm8",},
|
||||
{{0x0f, 0x38, 0xcd, 0x00, }, 4, 0, "", "",
|
||||
"0f 38 cd 00 \tsha256msg2 (%rax),%xmm0",},
|
||||
{{0x41, 0x0f, 0x38, 0xcd, 0x00, }, 5, 0, "", "",
|
||||
"41 0f 38 cd 00 \tsha256msg2 (%r8),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x04, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cd 04 25 78 56 34 12 \tsha256msg2 0x12345678,%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x18, }, 4, 0, "", "",
|
||||
"0f 38 cd 18 \tsha256msg2 (%rax),%xmm3",},
|
||||
{{0x0f, 0x38, 0xcd, 0x04, 0x01, }, 5, 0, "", "",
|
||||
"0f 38 cd 04 01 \tsha256msg2 (%rcx,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cd 04 05 78 56 34 12 \tsha256msg2 0x12345678(,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x04, 0x08, }, 5, 0, "", "",
|
||||
"0f 38 cd 04 08 \tsha256msg2 (%rax,%rcx,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x04, 0xc8, }, 5, 0, "", "",
|
||||
"0f 38 cd 04 c8 \tsha256msg2 (%rax,%rcx,8),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x40, 0x12, }, 5, 0, "", "",
|
||||
"0f 38 cd 40 12 \tsha256msg2 0x12(%rax),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x45, 0x12, }, 5, 0, "", "",
|
||||
"0f 38 cd 45 12 \tsha256msg2 0x12(%rbp),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x44, 0x01, 0x12, }, 6, 0, "", "",
|
||||
"0f 38 cd 44 01 12 \tsha256msg2 0x12(%rcx,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x44, 0x05, 0x12, }, 6, 0, "", "",
|
||||
"0f 38 cd 44 05 12 \tsha256msg2 0x12(%rbp,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x44, 0x08, 0x12, }, 6, 0, "", "",
|
||||
"0f 38 cd 44 08 12 \tsha256msg2 0x12(%rax,%rcx,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x44, 0xc8, 0x12, }, 6, 0, "", "",
|
||||
"0f 38 cd 44 c8 12 \tsha256msg2 0x12(%rax,%rcx,8),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x80, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
|
||||
"0f 38 cd 80 78 56 34 12 \tsha256msg2 0x12345678(%rax),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x85, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
|
||||
"0f 38 cd 85 78 56 34 12 \tsha256msg2 0x12345678(%rbp),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cd 84 01 78 56 34 12 \tsha256msg2 0x12345678(%rcx,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cd 84 05 78 56 34 12 \tsha256msg2 0x12345678(%rbp,%rax,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cd 84 08 78 56 34 12 \tsha256msg2 0x12345678(%rax,%rcx,1),%xmm0",},
|
||||
{{0x0f, 0x38, 0xcd, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
|
||||
"0f 38 cd 84 c8 78 56 34 12 \tsha256msg2 0x12345678(%rax,%rcx,8),%xmm0",},
|
||||
{{0x44, 0x0f, 0x38, 0xcd, 0xbc, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
|
||||
"44 0f 38 cd bc c8 78 56 34 12 \tsha256msg2 0x12345678(%rax,%rcx,8),%xmm15",},
|
||||
|
@ -217,6 +217,210 @@ int main(void)
|
||||
asm volatile("bnd jmp *(%ecx)"); /* Expecting: jmp indirect 0 */
|
||||
asm volatile("bnd jne label1"); /* Expecting: jcc conditional 0 */
|
||||
|
||||
/* sha1rnds4 imm8, xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha1rnds4 $0x0, %xmm1, %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, %xmm7, %xmm2");
|
||||
asm volatile("sha1rnds4 $0x91, %xmm8, %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, %xmm7, %xmm8");
|
||||
asm volatile("sha1rnds4 $0x91, %xmm15, %xmm8");
|
||||
asm volatile("sha1rnds4 $0x91, (%rax), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, (%r8), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, (0x12345678), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, (%rax), %xmm3");
|
||||
asm volatile("sha1rnds4 $0x91, (%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(,%rax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, (%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, (%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%rax), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%rbp), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%rax), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%rbp), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%rax,%rcx,8), %xmm15");
|
||||
|
||||
/* sha1nexte xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha1nexte %xmm1, %xmm0");
|
||||
asm volatile("sha1nexte %xmm7, %xmm2");
|
||||
asm volatile("sha1nexte %xmm8, %xmm0");
|
||||
asm volatile("sha1nexte %xmm7, %xmm8");
|
||||
asm volatile("sha1nexte %xmm15, %xmm8");
|
||||
asm volatile("sha1nexte (%rax), %xmm0");
|
||||
asm volatile("sha1nexte (%r8), %xmm0");
|
||||
asm volatile("sha1nexte (0x12345678), %xmm0");
|
||||
asm volatile("sha1nexte (%rax), %xmm3");
|
||||
asm volatile("sha1nexte (%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(,%rax,1), %xmm0");
|
||||
asm volatile("sha1nexte (%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1nexte (%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%rax), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%rbp), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%rax), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%rbp), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%rax,%rcx,8), %xmm15");
|
||||
|
||||
/* sha1msg1 xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha1msg1 %xmm1, %xmm0");
|
||||
asm volatile("sha1msg1 %xmm7, %xmm2");
|
||||
asm volatile("sha1msg1 %xmm8, %xmm0");
|
||||
asm volatile("sha1msg1 %xmm7, %xmm8");
|
||||
asm volatile("sha1msg1 %xmm15, %xmm8");
|
||||
asm volatile("sha1msg1 (%rax), %xmm0");
|
||||
asm volatile("sha1msg1 (%r8), %xmm0");
|
||||
asm volatile("sha1msg1 (0x12345678), %xmm0");
|
||||
asm volatile("sha1msg1 (%rax), %xmm3");
|
||||
asm volatile("sha1msg1 (%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg1 (%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1msg1 (%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%rax), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%rbp), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%rax), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%rbp), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%rax,%rcx,8), %xmm15");
|
||||
|
||||
/* sha1msg2 xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha1msg2 %xmm1, %xmm0");
|
||||
asm volatile("sha1msg2 %xmm7, %xmm2");
|
||||
asm volatile("sha1msg2 %xmm8, %xmm0");
|
||||
asm volatile("sha1msg2 %xmm7, %xmm8");
|
||||
asm volatile("sha1msg2 %xmm15, %xmm8");
|
||||
asm volatile("sha1msg2 (%rax), %xmm0");
|
||||
asm volatile("sha1msg2 (%r8), %xmm0");
|
||||
asm volatile("sha1msg2 (0x12345678), %xmm0");
|
||||
asm volatile("sha1msg2 (%rax), %xmm3");
|
||||
asm volatile("sha1msg2 (%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg2 (%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1msg2 (%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%rax), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%rbp), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%rax), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%rbp), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%rax,%rcx,8), %xmm15");
|
||||
|
||||
/* sha256rnds2 <XMM0>, xmm2/m128, xmm1 */
|
||||
/* Note sha256rnds2 has an implicit operand 'xmm0' */
|
||||
|
||||
asm volatile("sha256rnds2 %xmm4, %xmm1");
|
||||
asm volatile("sha256rnds2 %xmm7, %xmm2");
|
||||
asm volatile("sha256rnds2 %xmm8, %xmm1");
|
||||
asm volatile("sha256rnds2 %xmm7, %xmm8");
|
||||
asm volatile("sha256rnds2 %xmm15, %xmm8");
|
||||
asm volatile("sha256rnds2 (%rax), %xmm1");
|
||||
asm volatile("sha256rnds2 (%r8), %xmm1");
|
||||
asm volatile("sha256rnds2 (0x12345678), %xmm1");
|
||||
asm volatile("sha256rnds2 (%rax), %xmm3");
|
||||
asm volatile("sha256rnds2 (%rcx,%rax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(,%rax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 (%rax,%rcx,1), %xmm1");
|
||||
asm volatile("sha256rnds2 (%rax,%rcx,8), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%rax), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%rbp), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%rcx,%rax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%rbp,%rax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%rax,%rcx,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%rax,%rcx,8), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%rax), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%rbp), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%rcx,%rax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%rbp,%rax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%rax,%rcx,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%rax,%rcx,8), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%rax,%rcx,8), %xmm15");
|
||||
|
||||
/* sha256msg1 xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha256msg1 %xmm1, %xmm0");
|
||||
asm volatile("sha256msg1 %xmm7, %xmm2");
|
||||
asm volatile("sha256msg1 %xmm8, %xmm0");
|
||||
asm volatile("sha256msg1 %xmm7, %xmm8");
|
||||
asm volatile("sha256msg1 %xmm15, %xmm8");
|
||||
asm volatile("sha256msg1 (%rax), %xmm0");
|
||||
asm volatile("sha256msg1 (%r8), %xmm0");
|
||||
asm volatile("sha256msg1 (0x12345678), %xmm0");
|
||||
asm volatile("sha256msg1 (%rax), %xmm3");
|
||||
asm volatile("sha256msg1 (%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg1 (%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha256msg1 (%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%rax), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%rbp), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%rax), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%rbp), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%rax,%rcx,8), %xmm15");
|
||||
|
||||
/* sha256msg2 xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha256msg2 %xmm1, %xmm0");
|
||||
asm volatile("sha256msg2 %xmm7, %xmm2");
|
||||
asm volatile("sha256msg2 %xmm8, %xmm0");
|
||||
asm volatile("sha256msg2 %xmm7, %xmm8");
|
||||
asm volatile("sha256msg2 %xmm15, %xmm8");
|
||||
asm volatile("sha256msg2 (%rax), %xmm0");
|
||||
asm volatile("sha256msg2 (%r8), %xmm0");
|
||||
asm volatile("sha256msg2 (0x12345678), %xmm0");
|
||||
asm volatile("sha256msg2 (%rax), %xmm3");
|
||||
asm volatile("sha256msg2 (%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg2 (%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha256msg2 (%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%rax), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%rbp), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%rax), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%rbp), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%rcx,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%rbp,%rax,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%rax,%rcx,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%rax,%rcx,8), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%rax,%rcx,8), %xmm15");
|
||||
|
||||
#else /* #ifdef __x86_64__ */
|
||||
|
||||
/* bndmk m32, bnd */
|
||||
@ -407,6 +611,175 @@ int main(void)
|
||||
asm volatile("bnd jmp *(%ecx)"); /* Expecting: jmp indirect 0 */
|
||||
asm volatile("bnd jne label1"); /* Expecting: jcc conditional 0xfffffffc */
|
||||
|
||||
/* sha1rnds4 imm8, xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha1rnds4 $0x0, %xmm1, %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, %xmm7, %xmm2");
|
||||
asm volatile("sha1rnds4 $0x91, (%eax), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, (0x12345678), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, (%eax), %xmm3");
|
||||
asm volatile("sha1rnds4 $0x91, (%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(,%eax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, (%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, (%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%eax), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%ebp), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12(%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%eax), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%ebp), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1rnds4 $0x91, 0x12345678(%eax,%ecx,8), %xmm0");
|
||||
|
||||
/* sha1nexte xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha1nexte %xmm1, %xmm0");
|
||||
asm volatile("sha1nexte %xmm7, %xmm2");
|
||||
asm volatile("sha1nexte (%eax), %xmm0");
|
||||
asm volatile("sha1nexte (0x12345678), %xmm0");
|
||||
asm volatile("sha1nexte (%eax), %xmm3");
|
||||
asm volatile("sha1nexte (%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(,%eax,1), %xmm0");
|
||||
asm volatile("sha1nexte (%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1nexte (%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%eax), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%ebp), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12(%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%eax), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%ebp), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1nexte 0x12345678(%eax,%ecx,8), %xmm0");
|
||||
|
||||
/* sha1msg1 xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha1msg1 %xmm1, %xmm0");
|
||||
asm volatile("sha1msg1 %xmm7, %xmm2");
|
||||
asm volatile("sha1msg1 (%eax), %xmm0");
|
||||
asm volatile("sha1msg1 (0x12345678), %xmm0");
|
||||
asm volatile("sha1msg1 (%eax), %xmm3");
|
||||
asm volatile("sha1msg1 (%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg1 (%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1msg1 (%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%eax), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%ebp), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12(%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%eax), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%ebp), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1msg1 0x12345678(%eax,%ecx,8), %xmm0");
|
||||
|
||||
/* sha1msg2 xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha1msg2 %xmm1, %xmm0");
|
||||
asm volatile("sha1msg2 %xmm7, %xmm2");
|
||||
asm volatile("sha1msg2 (%eax), %xmm0");
|
||||
asm volatile("sha1msg2 (0x12345678), %xmm0");
|
||||
asm volatile("sha1msg2 (%eax), %xmm3");
|
||||
asm volatile("sha1msg2 (%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg2 (%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1msg2 (%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%eax), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%ebp), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12(%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%eax), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%ebp), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha1msg2 0x12345678(%eax,%ecx,8), %xmm0");
|
||||
|
||||
/* sha256rnds2 <XMM0>, xmm2/m128, xmm1 */
|
||||
/* Note sha256rnds2 has an implicit operand 'xmm0' */
|
||||
|
||||
asm volatile("sha256rnds2 %xmm4, %xmm1");
|
||||
asm volatile("sha256rnds2 %xmm7, %xmm2");
|
||||
asm volatile("sha256rnds2 (%eax), %xmm1");
|
||||
asm volatile("sha256rnds2 (0x12345678), %xmm1");
|
||||
asm volatile("sha256rnds2 (%eax), %xmm3");
|
||||
asm volatile("sha256rnds2 (%ecx,%eax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(,%eax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 (%eax,%ecx,1), %xmm1");
|
||||
asm volatile("sha256rnds2 (%eax,%ecx,8), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%eax), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%ebp), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%ecx,%eax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%ebp,%eax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%eax,%ecx,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12(%eax,%ecx,8), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%eax), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%ebp), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%ecx,%eax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%ebp,%eax,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%eax,%ecx,1), %xmm1");
|
||||
asm volatile("sha256rnds2 0x12345678(%eax,%ecx,8), %xmm1");
|
||||
|
||||
/* sha256msg1 xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha256msg1 %xmm1, %xmm0");
|
||||
asm volatile("sha256msg1 %xmm7, %xmm2");
|
||||
asm volatile("sha256msg1 (%eax), %xmm0");
|
||||
asm volatile("sha256msg1 (0x12345678), %xmm0");
|
||||
asm volatile("sha256msg1 (%eax), %xmm3");
|
||||
asm volatile("sha256msg1 (%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg1 (%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha256msg1 (%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%eax), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%ebp), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12(%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%eax), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%ebp), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha256msg1 0x12345678(%eax,%ecx,8), %xmm0");
|
||||
|
||||
/* sha256msg2 xmm2/m128, xmm1 */
|
||||
|
||||
asm volatile("sha256msg2 %xmm1, %xmm0");
|
||||
asm volatile("sha256msg2 %xmm7, %xmm2");
|
||||
asm volatile("sha256msg2 (%eax), %xmm0");
|
||||
asm volatile("sha256msg2 (0x12345678), %xmm0");
|
||||
asm volatile("sha256msg2 (%eax), %xmm3");
|
||||
asm volatile("sha256msg2 (%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg2 (%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha256msg2 (%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%eax), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%ebp), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12(%eax,%ecx,8), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%eax), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%ebp), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%ecx,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%ebp,%eax,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%eax,%ecx,1), %xmm0");
|
||||
asm volatile("sha256msg2 0x12345678(%eax,%ecx,8), %xmm0");
|
||||
|
||||
#endif /* #ifndef __x86_64__ */
|
||||
|
||||
/* Following line is a marker for the awk script - do not change */
|
||||
|
@ -736,6 +736,12 @@ bd: vfnmadd231ss/d Vx,Hx,Wx (66),(v),(v1)
|
||||
be: vfnmsub231ps/d Vx,Hx,Wx (66),(v)
|
||||
bf: vfnmsub231ss/d Vx,Hx,Wx (66),(v),(v1)
|
||||
# 0x0f 0x38 0xc0-0xff
|
||||
c8: sha1nexte Vdq,Wdq
|
||||
c9: sha1msg1 Vdq,Wdq
|
||||
ca: sha1msg2 Vdq,Wdq
|
||||
cb: sha256rnds2 Vdq,Wdq
|
||||
cc: sha256msg1 Vdq,Wdq
|
||||
cd: sha256msg2 Vdq,Wdq
|
||||
db: VAESIMC Vdq,Wdq (66),(v1)
|
||||
dc: VAESENC Vdq,Hdq,Wdq (66),(v1)
|
||||
dd: VAESENCLAST Vdq,Hdq,Wdq (66),(v1)
|
||||
@ -794,6 +800,7 @@ AVXcode: 3
|
||||
61: vpcmpestri Vdq,Wdq,Ib (66),(v1)
|
||||
62: vpcmpistrm Vdq,Wdq,Ib (66),(v1)
|
||||
63: vpcmpistri Vdq,Wdq,Ib (66),(v1)
|
||||
cc: sha1rnds4 Vdq,Wdq,Ib
|
||||
df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
|
||||
f0: RORX Gy,Ey,Ib (F2),(v)
|
||||
EndTable
|
||||
|
Loading…
Reference in New Issue
Block a user