[SPARC64]: Break up inherit_prom_mappings() into it's constituent parts.
This thing was just a huge monolithic mess, so chop it up. Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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b206fc4c09
commit
405599bd98
@ -362,84 +362,107 @@ unsigned long prom_virt_to_phys(unsigned long promva, int *error)
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return(base + (promva & (BASE_PAGE_SIZE - 1)));
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}
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static void inherit_prom_mappings(void)
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static inline int in_obp_range(unsigned long vaddr)
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{
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unsigned long phys_page, tte_vaddr, tte_data;
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void (*remap_func)(unsigned long, unsigned long, int);
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pmd_t *pmdp;
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pte_t *ptep;
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int node, n, i, tsz;
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return (vaddr >= LOW_OBP_ADDRESS &&
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vaddr < HI_OBP_ADDRESS);
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}
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/* The obp translations are saved based on 8k pagesize, since obp can
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* use a mixture of pagesizes. Misses to the LOW_OBP_ADDRESS ->
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* HI_OBP_ADDRESS range are handled in entry.S and do not use the vpte
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* scheme (also, see rant in inherit_locked_prom_mappings()).
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*/
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static void build_obp_range(unsigned long start, unsigned long end, unsigned long data)
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{
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unsigned long vaddr;
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for (vaddr = start; vaddr < end; vaddr += BASE_PAGE_SIZE) {
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unsigned long val;
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pmd_t *pmdp;
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pte_t *ptep;
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pmdp = prompmd + ((vaddr >> 23) & 0x7ff);
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if (pmd_none(*pmdp)) {
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ptep = __alloc_bootmem(BASE_PAGE_SIZE,
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BASE_PAGE_SIZE,
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bootmap_base);
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if (ptep == NULL)
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early_pgtable_allocfail("pte");
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memset(ptep, 0, BASE_PAGE_SIZE);
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pmd_set(pmdp, ptep);
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}
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ptep = (pte_t *)__pmd_page(*pmdp) +
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((vaddr >> 13) & 0x3ff);
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val = data;
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/* Clear diag TTE bits. */
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if (tlb_type == spitfire)
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val &= ~0x0003fe0000000000UL;
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set_pte_at(&init_mm, vaddr,
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ptep, __pte(val | _PAGE_MODIFIED));
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data += BASE_PAGE_SIZE;
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}
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}
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#define OBP_PMD_SIZE 2048
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static void build_obp_pgtable(int prom_trans_ents)
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{
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int i;
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prompmd = __alloc_bootmem(OBP_PMD_SIZE, OBP_PMD_SIZE,
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bootmap_base);
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if (prompmd == NULL)
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early_pgtable_allocfail("pmd");
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memset(prompmd, 0, OBP_PMD_SIZE);
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for (i = 0; i < prom_trans_ents; i++) {
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unsigned long start, end;
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if (!in_obp_range(prom_trans[i].virt))
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continue;
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start = prom_trans[i].virt;
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end = start + prom_trans[i].size;
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if (end > HI_OBP_ADDRESS)
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end = HI_OBP_ADDRESS;
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build_obp_range(start, end, prom_trans[i].data);
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}
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prom_pmd_phys = __pa(prompmd);
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}
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/* Read OBP translations property into 'prom_trans[]'.
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* Return the number of entries.
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*/
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static int read_obp_translations(void)
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{
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int n, node;
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node = prom_finddevice("/virtual-memory");
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n = prom_getproplen(node, "translations");
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if (n == 0 || n == -1) {
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if (unlikely(n == 0 || n == -1)) {
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prom_printf("prom_mappings: Couldn't get size.\n");
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prom_halt();
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}
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n += 24 * sizeof(struct linux_prom_translation);
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if (n > sizeof(prom_trans)) {
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prom_printf("prom_mappings: prom_trans too small, "
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"need %Zd bytes\n", n);
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if (unlikely(n > sizeof(prom_trans))) {
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prom_printf("prom_mappings: Size %Zd is too big.\n", n);
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prom_halt();
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}
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tsz = n;
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if ((n = prom_getproperty(node, "translations",
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(char *)&prom_trans[0], tsz)) == -1) {
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(char *)&prom_trans[0],
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sizeof(prom_trans))) == -1) {
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prom_printf("prom_mappings: Couldn't get property.\n");
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prom_halt();
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}
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n = n / sizeof(struct linux_prom_translation);
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return n;
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}
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/* The obp translations are saved based on 8k pagesize, since obp
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* can use a mixture of pagesizes. Misses to the 0xf0000000 ->
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* 0x100000000, ie obp range, are handled in entry.S and do not
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* use the vpte scheme (see rant: inherit_locked_prom_mappings).
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*/
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#define OBP_PMD_SIZE 2048
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prompmd = __alloc_bootmem(OBP_PMD_SIZE, OBP_PMD_SIZE, bootmap_base);
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if (prompmd == NULL)
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early_pgtable_allocfail("pmd");
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memset(prompmd, 0, OBP_PMD_SIZE);
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for (i = 0; i < n; i++) {
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unsigned long vaddr;
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if (prom_trans[i].virt >= LOW_OBP_ADDRESS && prom_trans[i].virt < HI_OBP_ADDRESS) {
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for (vaddr = prom_trans[i].virt;
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((vaddr < prom_trans[i].virt + prom_trans[i].size) &&
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(vaddr < HI_OBP_ADDRESS));
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vaddr += BASE_PAGE_SIZE) {
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unsigned long val;
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pmdp = prompmd + ((vaddr >> 23) & 0x7ff);
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if (pmd_none(*pmdp)) {
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ptep = __alloc_bootmem(BASE_PAGE_SIZE,
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BASE_PAGE_SIZE,
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bootmap_base);
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if (ptep == NULL)
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early_pgtable_allocfail("pte");
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memset(ptep, 0, BASE_PAGE_SIZE);
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pmd_set(pmdp, ptep);
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}
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ptep = (pte_t *)__pmd_page(*pmdp) +
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((vaddr >> 13) & 0x3ff);
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val = prom_trans[i].data;
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/* Clear diag TTE bits. */
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if (tlb_type == spitfire)
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val &= ~0x0003fe0000000000UL;
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set_pte_at(&init_mm, vaddr,
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ptep, __pte(val | _PAGE_MODIFIED));
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prom_trans[i].data += BASE_PAGE_SIZE;
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}
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}
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}
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prom_pmd_phys = __pa(prompmd);
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/* Now fixup OBP's idea about where we really are mapped. */
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prom_printf("Remapping the kernel... ");
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static inline void early_spitfire_errata32(void)
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{
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/* Spitfire Errata #32 workaround */
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/* NOTE: Using plain zero for the context value is
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* correct here, we are not using the Linux trap
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@ -449,23 +472,13 @@ static void inherit_prom_mappings(void)
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__asm__ __volatile__("stxa %0, [%1] %2\n\t"
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"flush %%g6"
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: /* No outputs */
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: "r" (0), "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
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: "r" (0), "r" (PRIMARY_CONTEXT),
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"i" (ASI_DMMU));
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}
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switch (tlb_type) {
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default:
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case spitfire:
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phys_page = spitfire_get_dtlb_data(sparc64_highest_locked_tlbent());
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break;
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case cheetah:
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case cheetah_plus:
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phys_page = cheetah_get_litlb_data(sparc64_highest_locked_tlbent());
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break;
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};
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phys_page &= _PAGE_PADDR;
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phys_page += ((unsigned long)&prom_boot_page -
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(unsigned long)KERNBASE);
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static void lock_remap_func_page(unsigned long phys_page)
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{
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unsigned long tte_data = (phys_page | pgprot_val(PAGE_KERNEL));
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if (tlb_type == spitfire) {
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/* Lock this into i/d tlb entry 59 */
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@ -478,13 +491,12 @@ static void inherit_prom_mappings(void)
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"stxa %0, [%1] %6\n\t"
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"membar #Sync\n\t"
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"flush %%g6"
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: : "r" (phys_page | _PAGE_VALID | _PAGE_SZ8K | _PAGE_CP |
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_PAGE_CV | _PAGE_P | _PAGE_L | _PAGE_W),
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"r" (59 << 3), "r" (TLB_TAG_ACCESS),
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"i" (ASI_DMMU), "i" (ASI_DTLB_DATA_ACCESS),
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"i" (ASI_IMMU), "i" (ASI_ITLB_DATA_ACCESS)
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: "memory");
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} else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
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: /* no outputs */
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: "r" (tte_data), "r" (59 << 3), "r" (TLB_TAG_ACCESS),
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"i" (ASI_DMMU), "i" (ASI_DTLB_DATA_ACCESS),
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"i" (ASI_IMMU), "i" (ASI_ITLB_DATA_ACCESS)
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: "memory");
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} else {
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/* Lock this into i/d tlb-0 entry 11 */
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__asm__ __volatile__(
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"stxa %%g0, [%2] %3\n\t"
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@ -495,87 +507,80 @@ static void inherit_prom_mappings(void)
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"stxa %0, [%1] %6\n\t"
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"membar #Sync\n\t"
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"flush %%g6"
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: : "r" (phys_page | _PAGE_VALID | _PAGE_SZ8K | _PAGE_CP |
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_PAGE_CV | _PAGE_P | _PAGE_L | _PAGE_W),
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"r" ((0 << 16) | (11 << 3)), "r" (TLB_TAG_ACCESS),
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"i" (ASI_DMMU), "i" (ASI_DTLB_DATA_ACCESS),
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"i" (ASI_IMMU), "i" (ASI_ITLB_DATA_ACCESS)
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: /* no outputs */
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: "r" (tte_data), "r" ((0 << 16) | (11 << 3)),
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"r" (TLB_TAG_ACCESS), "i" (ASI_DMMU),
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"i" (ASI_DTLB_DATA_ACCESS), "i" (ASI_IMMU),
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"i" (ASI_ITLB_DATA_ACCESS)
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: "memory");
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} else {
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/* Implement me :-) */
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BUG();
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}
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}
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static void remap_kernel(void)
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{
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unsigned long phys_page, tte_vaddr, tte_data;
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void (*remap_func)(unsigned long, unsigned long, int);
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int tlb_ent = sparc64_highest_locked_tlbent();
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early_spitfire_errata32();
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if (tlb_type == spitfire)
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phys_page = spitfire_get_dtlb_data(tlb_ent);
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else
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phys_page = cheetah_get_ldtlb_data(tlb_ent);
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phys_page &= _PAGE_PADDR;
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phys_page += ((unsigned long)&prom_boot_page -
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(unsigned long)KERNBASE);
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lock_remap_func_page(phys_page);
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tte_vaddr = (unsigned long) KERNBASE;
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/* Spitfire Errata #32 workaround */
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/* NOTE: Using plain zero for the context value is
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* correct here, we are not using the Linux trap
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* tables yet so we should not use the special
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* UltraSPARC-III+ page size encodings yet.
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*/
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__asm__ __volatile__("stxa %0, [%1] %2\n\t"
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"flush %%g6"
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: /* No outputs */
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: "r" (0),
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"r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
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early_spitfire_errata32();
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if (tlb_type == spitfire)
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tte_data = spitfire_get_dtlb_data(sparc64_highest_locked_tlbent());
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tte_data = spitfire_get_dtlb_data(tlb_ent);
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else
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tte_data = cheetah_get_ldtlb_data(sparc64_highest_locked_tlbent());
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tte_data = cheetah_get_ldtlb_data(tlb_ent);
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kern_locked_tte_data = tte_data;
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remap_func = (void *) ((unsigned long) &prom_remap -
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(unsigned long) &prom_boot_page);
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early_spitfire_errata32();
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/* Spitfire Errata #32 workaround */
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/* NOTE: Using plain zero for the context value is
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* correct here, we are not using the Linux trap
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* tables yet so we should not use the special
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* UltraSPARC-III+ page size encodings yet.
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*/
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__asm__ __volatile__("stxa %0, [%1] %2\n\t"
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"flush %%g6"
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: /* No outputs */
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: "r" (0),
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"r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
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remap_func((tlb_type == spitfire ?
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(spitfire_get_dtlb_data(sparc64_highest_locked_tlbent()) & _PAGE_PADDR) :
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(cheetah_get_litlb_data(sparc64_highest_locked_tlbent()) & _PAGE_PADDR)),
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(unsigned long) KERNBASE,
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prom_get_mmu_ihandle());
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phys_page = tte_data & _PAGE_PADDR;
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remap_func(phys_page, KERNBASE, prom_get_mmu_ihandle());
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if (bigkernel)
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remap_func(((tte_data + 0x400000) & _PAGE_PADDR),
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(unsigned long) KERNBASE + 0x400000, prom_get_mmu_ihandle());
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remap_func(phys_page + 0x400000,
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KERNBASE + 0x400000,
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prom_get_mmu_ihandle());
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/* Flush out that temporary mapping. */
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spitfire_flush_dtlb_nucleus_page(0x0);
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spitfire_flush_itlb_nucleus_page(0x0);
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/* Now lock us back into the TLBs via OBP. */
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prom_dtlb_load(sparc64_highest_locked_tlbent(), tte_data, tte_vaddr);
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prom_itlb_load(sparc64_highest_locked_tlbent(), tte_data, tte_vaddr);
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prom_dtlb_load(tlb_ent, tte_data, tte_vaddr);
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prom_itlb_load(tlb_ent, tte_data, tte_vaddr);
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if (bigkernel) {
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prom_dtlb_load(sparc64_highest_locked_tlbent()-1, tte_data + 0x400000,
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tte_vaddr + 0x400000);
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prom_itlb_load(sparc64_highest_locked_tlbent()-1, tte_data + 0x400000,
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tte_vaddr + 0x400000);
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prom_dtlb_load(tlb_ent - 1,
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tte_data + 0x400000,
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tte_vaddr + 0x400000);
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prom_itlb_load(tlb_ent - 1,
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tte_data + 0x400000,
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tte_vaddr + 0x400000);
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}
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}
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/* Re-read translations property. */
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if ((n = prom_getproperty(node, "translations",
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(char *)&prom_trans[0], tsz)) == -1) {
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prom_printf("prom_mappings: Can't reread prom_trans.\n");
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prom_halt();
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}
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n = n / sizeof(struct linux_prom_translation);
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static void readjust_prom_translations(void)
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{
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int nents, i;
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for (i = 0; i < n; i++) {
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nents = read_obp_translations();
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for (i = 0; i < nents; i++) {
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unsigned long vaddr = prom_trans[i].virt;
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unsigned long size = prom_trans[i].size;
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@ -601,6 +606,20 @@ static void inherit_prom_mappings(void)
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}
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}
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}
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}
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static void inherit_prom_mappings(void)
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{
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int n;
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n = read_obp_translations();
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build_obp_pgtable(n);
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/* Now fixup OBP's idea about where we really are mapped. */
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prom_printf("Remapping the kernel... ");
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remap_kernel();
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readjust_prom_translations();
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prom_printf("done.\n");
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