[Blackfin] arch: remove old I2C BF54x porting.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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@ -244,39 +244,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
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#define bfin_read_TWI0_RCV_DATA16() bfin_read16(TWI0_RCV_DATA16)
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#define bfin_write_TWI0_RCV_DATA16(val) bfin_write16(TWI0_RCV_DATA16, val)
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#define bfin_read_TWI_CLKDIV() bfin_read16(TWI0_CLKDIV)
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#define bfin_write_TWI_CLKDIV(val) bfin_write16(TWI0_CLKDIV, val)
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#define bfin_read_TWI_CONTROL() bfin_read16(TWI0_CONTROL)
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#define bfin_write_TWI_CONTROL(val) bfin_write16(TWI0_CONTROL, val)
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#define bfin_read_TWI_SLAVE_CTRL() bfin_read16(TWI0_SLAVE_CTRL)
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#define bfin_write_TWI_SLAVE_CTRL(val) bfin_write16(TWI0_SLAVE_CTRL, val)
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#define bfin_read_TWI_SLAVE_STAT() bfin_read16(TWI0_SLAVE_STAT)
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#define bfin_write_TWI_SLAVE_STAT(val) bfin_write16(TWI0_SLAVE_STAT, val)
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#define bfin_read_TWI_SLAVE_ADDR() bfin_read16(TWI0_SLAVE_ADDR)
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#define bfin_write_TWI_SLAVE_ADDR(val) bfin_write16(TWI0_SLAVE_ADDR, val)
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#define bfin_read_TWI_MASTER_CTL() bfin_read16(TWI0_MASTER_CTRL)
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#define bfin_write_TWI_MASTER_CTL(val) bfin_write16(TWI0_MASTER_CTRL, val)
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#define bfin_read_TWI_MASTER_STAT() bfin_read16(TWI0_MASTER_STAT)
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#define bfin_write_TWI_MASTER_STAT(val) bfin_write16(TWI0_MASTER_STAT, val)
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#define bfin_read_TWI_MASTER_ADDR() bfin_read16(TWI0_MASTER_ADDR)
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#define bfin_write_TWI_MASTER_ADDR(val) bfin_write16(TWI0_MASTER_ADDR, val)
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#define bfin_read_TWI_INT_STAT() bfin_read16(TWI0_INT_STAT)
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#define bfin_write_TWI_INT_STAT(val) bfin_write16(TWI0_INT_STAT, val)
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#define bfin_read_TWI_INT_MASK() bfin_read16(TWI0_INT_MASK)
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#define bfin_write_TWI_INT_MASK(val) bfin_write16(TWI0_INT_MASK, val)
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#define bfin_read_TWI_FIFO_CTL() bfin_read16(TWI0_FIFO_CTRL)
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#define bfin_write_TWI_FIFO_CTL(val) bfin_write16(TWI0_FIFO_CTRL, val)
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#define bfin_read_TWI_FIFO_STAT() bfin_read16(TWI0_FIFO_STAT)
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#define bfin_write_TWI_FIFO_STAT(val) bfin_write16(TWI0_FIFO_STAT, val)
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#define bfin_read_TWI_XMT_DATA8() bfin_read16(TWI0_XMT_DATA8)
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#define bfin_write_TWI_XMT_DATA8(val) bfin_write16(TWI0_XMT_DATA8, val)
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#define bfin_read_TWI_XMT_DATA16() bfin_read16(TWI0_XMT_DATA16)
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#define bfin_write_TWI_XMT_DATA16(val) bfin_write16(TWI0_XMT_DATA16, val)
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#define bfin_read_TWI_RCV_DATA8() bfin_read16(TWI0_RCV_DATA8)
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#define bfin_write_TWI_RCV_DATA8(val) bfin_write16(TWI0_RCV_DATA8, val)
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#define bfin_read_TWI_RCV_DATA16() bfin_read16(TWI0_RCV_DATA16)
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#define bfin_write_TWI_RCV_DATA16(val) bfin_write16(TWI0_RCV_DATA16, val)
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/* SPORT0 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */
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/* SPORT1 Registers */
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