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ASoC: SOF: Intel: mtl: Correct the mtl_dsp_dump output

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The ROM/firmware state handling has changed between CAVS and ACE
architecture:
CAVS: ROM and firmware uses the SRAM window for the state and status/error
code reporting

ACE: ROM code is using two registers to report the state and error while
the firmware is using the SRAM window to report states and status/error
codes.

Use the generic hda_dsp_get_state() to decode ROM state and error codes and
print out the firmware state and status/error code only if the SRAM
window is accessible - the firmware is booted and the Status readout is
not 0xffffffff.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Liam Girdwood <liam.r.girdwood@intel.com>
Link: https://msgid.link/r/20240403105210.17949-8-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Peter Ujfalusi 2024-04-03 13:52:10 +03:00 committed by Mark Brown
parent 3dc2682870
commit 40bdf121a3
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GPG Key ID: 24D68B725D5487D0
1 changed files with 4 additions and 10 deletions
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14
sound/soc/sof/intel/mtl.c
View File

@ -310,22 +310,16 @@ int mtl_dsp_post_fw_run(struct snd_sof_dev *sdev)
void mtl_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
{
char *level = (flags & SOF_DBG_DUMP_OPTIONAL) ? KERN_DEBUG : KERN_ERR;
u32 romdbgsts;
u32 romdbgerr;
u32 fwsts;
u32 fwlec;
hda_dsp_get_state(sdev, level);
fwsts = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_ROM_STS);
fwlec = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_ROM_ERROR);
romdbgsts = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFFLGPXQWY);
romdbgerr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFFLGPXQWY_ERROR);
dev_err(sdev->dev, "ROM status: %#x, ROM error: %#x\n", fwsts, fwlec);
dev_err(sdev->dev, "ROM debug status: %#x, ROM debug error: %#x\n", romdbgsts,
romdbgerr);
romdbgsts = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFFLGPXQWY + 0x8 * 3);
dev_printk(level, sdev->dev, "ROM feature bit%s enabled\n",
romdbgsts & BIT(24) ? "" : " not");
if (fwsts != 0xffffffff)
dev_err(sdev->dev, "Firmware state: %#x, status/error code: %#x\n",
fwsts, fwlec);
sof_ipc4_intel_dump_telemetry_state(sdev, flags);
}