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spi: s3c64xx: retrieve the FIFO depth from the device tree

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There are SoCs that configure different FIFO depths for their instances
of the SPI IP. See the fifo_lvl_mask defined for exynos4_spi_port_config
for example:
        .fifo_lvl_mask  = { 0x1ff, 0x7F, 0x7F },
The first instance of the IP is configured with 256 bytes FIFOs, whereas
the last two are configured with 64 bytes FIFOs.

Instead of mangling with the .fifo_lvl_mask and its dependency of the DT
alias ID, allow such SoCs to determine the FIFO depth via the
``fifo-depth`` DT property.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://msgid.link/r/20240216070555.2483977-6-tudor.ambarus@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Tudor Ambarus 2024-02-16 07:05:48 +00:00 committed by Mark Brown
parent c6e776ab6a
commit 414d7b8c91
1 changed files with 3 additions and 1 deletions
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4
drivers/spi/spi-s3c64xx.c
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@ -1263,7 +1263,9 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
sdd->port_id = pdev->id;
}
sdd->fifo_depth = FIFO_DEPTH(sdd);
if (of_property_read_u32(pdev->dev.of_node, "fifo-depth",
&sdd->fifo_depth))
sdd->fifo_depth = FIFO_DEPTH(sdd);
s3c64xx_spi_set_fifomask(sdd);