net: ibm_newemac: convert it to use of_get_phy_mode
The patch extends 'enum phy_interface_t' and of_get_phy_mode a little bit with PHY_INTERFACE_MODE_NA and PHY_INTERFACE_MODE_SMII added, and then converts ibm_newemac net driver to use of_get_phy_mode getting phy mode from device tree. It also resolves the namespace conflict on phy_read/write between common mdiobus interface and ibm_newemac private one. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: David S. Miller <davem@davemloft.net> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: David Miller <davem@davemloft.net>
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@ -39,6 +39,7 @@
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#include <linux/bitops.h>
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#include <linux/bitops.h>
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#include <linux/workqueue.h>
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#include <linux/workqueue.h>
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#include <linux/of.h>
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#include <linux/of.h>
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#include <linux/of_net.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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@ -2506,18 +2507,6 @@ static int __devinit emac_init_config(struct emac_instance *dev)
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{
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{
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struct device_node *np = dev->ofdev->dev.of_node;
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struct device_node *np = dev->ofdev->dev.of_node;
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const void *p;
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const void *p;
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unsigned int plen;
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const char *pm, *phy_modes[] = {
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[PHY_MODE_NA] = "",
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[PHY_MODE_MII] = "mii",
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[PHY_MODE_RMII] = "rmii",
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[PHY_MODE_SMII] = "smii",
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[PHY_MODE_RGMII] = "rgmii",
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[PHY_MODE_TBI] = "tbi",
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[PHY_MODE_GMII] = "gmii",
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[PHY_MODE_RTBI] = "rtbi",
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[PHY_MODE_SGMII] = "sgmii",
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};
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/* Read config from device-tree */
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/* Read config from device-tree */
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if (emac_read_uint_prop(np, "mal-device", &dev->mal_ph, 1))
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if (emac_read_uint_prop(np, "mal-device", &dev->mal_ph, 1))
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@ -2566,23 +2555,9 @@ static int __devinit emac_init_config(struct emac_instance *dev)
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dev->mal_burst_size = 256;
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dev->mal_burst_size = 256;
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/* PHY mode needs some decoding */
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/* PHY mode needs some decoding */
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dev->phy_mode = PHY_MODE_NA;
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dev->phy_mode = of_get_phy_mode(np);
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pm = of_get_property(np, "phy-mode", &plen);
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if (dev->phy_mode < 0)
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if (pm != NULL) {
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dev->phy_mode = PHY_MODE_NA;
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int i;
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for (i = 0; i < ARRAY_SIZE(phy_modes); i++)
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if (!strcasecmp(pm, phy_modes[i])) {
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dev->phy_mode = i;
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break;
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}
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}
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/* Backward compat with non-final DT */
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if (dev->phy_mode == PHY_MODE_NA && pm != NULL && plen == 4) {
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u32 nmode = *(const u32 *)pm;
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if (nmode > PHY_MODE_NA && nmode <= PHY_MODE_SGMII)
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dev->phy_mode = nmode;
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}
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/* Check EMAC version */
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/* Check EMAC version */
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if (of_device_is_compatible(np, "ibm,emac4sync")) {
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if (of_device_is_compatible(np, "ibm,emac4sync")) {
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@ -26,6 +26,7 @@
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#define __IBM_NEWEMAC_H
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#define __IBM_NEWEMAC_H
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#include <linux/types.h>
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#include <linux/types.h>
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#include <linux/phy.h>
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/* EMAC registers Write Access rules */
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/* EMAC registers Write Access rules */
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struct emac_regs {
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struct emac_regs {
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@ -106,15 +107,15 @@ struct emac_regs {
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/*
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/*
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* PHY mode settings (EMAC <-> ZMII/RGMII bridge <-> PHY)
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* PHY mode settings (EMAC <-> ZMII/RGMII bridge <-> PHY)
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*/
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*/
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#define PHY_MODE_NA 0
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#define PHY_MODE_NA PHY_INTERFACE_MODE_NA
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#define PHY_MODE_MII 1
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#define PHY_MODE_MII PHY_INTERFACE_MODE_MII
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#define PHY_MODE_RMII 2
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#define PHY_MODE_RMII PHY_INTERFACE_MODE_RMII
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#define PHY_MODE_SMII 3
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#define PHY_MODE_SMII PHY_INTERFACE_MODE_SMII
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#define PHY_MODE_RGMII 4
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#define PHY_MODE_RGMII PHY_INTERFACE_MODE_RGMII
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#define PHY_MODE_TBI 5
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#define PHY_MODE_TBI PHY_INTERFACE_MODE_TBI
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#define PHY_MODE_GMII 6
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#define PHY_MODE_GMII PHY_INTERFACE_MODE_GMII
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#define PHY_MODE_RTBI 7
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#define PHY_MODE_RTBI PHY_INTERFACE_MODE_RTBI
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#define PHY_MODE_SGMII 8
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#define PHY_MODE_SGMII PHY_INTERFACE_MODE_SGMII
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/* EMACx_MR0 */
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/* EMACx_MR0 */
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#define EMAC_MR0_RXI 0x80000000
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#define EMAC_MR0_RXI 0x80000000
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@ -28,12 +28,15 @@
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#include "emac.h"
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#include "emac.h"
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#include "phy.h"
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#include "phy.h"
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static inline int phy_read(struct mii_phy *phy, int reg)
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#define phy_read _phy_read
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#define phy_write _phy_write
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static inline int _phy_read(struct mii_phy *phy, int reg)
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{
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{
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return phy->mdio_read(phy->dev, phy->address, reg);
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return phy->mdio_read(phy->dev, phy->address, reg);
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}
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}
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static inline void phy_write(struct mii_phy *phy, int reg, int val)
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static inline void _phy_write(struct mii_phy *phy, int reg, int val)
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{
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{
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phy->mdio_write(phy->dev, phy->address, reg, val);
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phy->mdio_write(phy->dev, phy->address, reg, val);
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}
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}
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@ -16,6 +16,7 @@
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* device driver can get phy interface from device tree.
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* device driver can get phy interface from device tree.
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*/
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*/
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static const char *phy_modes[] = {
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static const char *phy_modes[] = {
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[PHY_INTERFACE_MODE_NA] = "",
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[PHY_INTERFACE_MODE_MII] = "mii",
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[PHY_INTERFACE_MODE_MII] = "mii",
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[PHY_INTERFACE_MODE_GMII] = "gmii",
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[PHY_INTERFACE_MODE_GMII] = "gmii",
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[PHY_INTERFACE_MODE_SGMII] = "sgmii",
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[PHY_INTERFACE_MODE_SGMII] = "sgmii",
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@ -26,6 +27,7 @@ static const char *phy_modes[] = {
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[PHY_INTERFACE_MODE_RGMII_RXID] = "rgmii-rxid",
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[PHY_INTERFACE_MODE_RGMII_RXID] = "rgmii-rxid",
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[PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid",
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[PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid",
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[PHY_INTERFACE_MODE_RTBI] = "rtbi",
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[PHY_INTERFACE_MODE_RTBI] = "rtbi",
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[PHY_INTERFACE_MODE_SMII] = "smii",
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};
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};
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/**
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/**
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@ -53,6 +53,7 @@
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/* Interface Mode definitions */
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/* Interface Mode definitions */
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typedef enum {
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typedef enum {
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PHY_INTERFACE_MODE_NA,
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PHY_INTERFACE_MODE_MII,
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PHY_INTERFACE_MODE_MII,
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PHY_INTERFACE_MODE_GMII,
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PHY_INTERFACE_MODE_GMII,
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PHY_INTERFACE_MODE_SGMII,
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PHY_INTERFACE_MODE_SGMII,
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@ -62,7 +63,8 @@ typedef enum {
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PHY_INTERFACE_MODE_RGMII_ID,
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PHY_INTERFACE_MODE_RGMII_ID,
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PHY_INTERFACE_MODE_RGMII_RXID,
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PHY_INTERFACE_MODE_RGMII_RXID,
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PHY_INTERFACE_MODE_RGMII_TXID,
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PHY_INTERFACE_MODE_RGMII_TXID,
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PHY_INTERFACE_MODE_RTBI
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PHY_INTERFACE_MODE_RTBI,
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PHY_INTERFACE_MODE_SMII,
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} phy_interface_t;
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} phy_interface_t;
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