arm64: dts: freescale: debix-som-a-bmb-08: Add CSI Power Regulators

Provide the 1.8 and 3.3 volt regulators that are utilised on the Debix
SOM BMB-08 base board.

Facilitate this by also supplying the pin control used to enable the
regulators on the second MIPI CSI port.

Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Kieran Bingham 2023-11-27 12:40:34 +00:00 committed by Shawn Guo
parent dfd3647c13
commit 4168df27f5

View File

@ -63,6 +63,50 @@
regulator-always-on;
};
reg_csi1_1v8: regulator-csi1-vdd1v8 {
compatible = "regulator-fixed";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "CSI1_VDD1V8";
gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_baseboard_vdd3v3>;
};
reg_csi1_3v3: regulator-csi1-vdd3v3 {
compatible = "regulator-fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "CSI1_VDD3V3";
gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_vdd5v0>;
};
reg_csi2_1v8: regulator-csi2-vdd1v8 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_csi2_1v8>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "CSI2_VDD1V8";
gpio = <&gpio3 21 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_baseboard_vdd3v3>;
};
reg_csi2_3v3: regulator-csi2-vdd3v3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_csi2_3v3>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "CSI2_VDD3V3";
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_vdd5v0>;
};
regulator-vbus-usb20 {
compatible = "regulator-fixed";
regulator-min-microvolt = <5000000>;
@ -413,6 +457,18 @@
>;
};
pinctrl_reg_csi2_1v8: regcsi21v8grp {
fsl,pins = <
MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x19
>;
};
pinctrl_reg_csi2_3v3: regcsi23v3grp {
fsl,pins = <
MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x19
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x14f