iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge branch 'hns3-new-features'

Browse Source 
Guangbin Huang says:

====================
hns3: add some new features

This series adds some new features for the HNS3 ethernet driver.

Patches #1~#3 support configuring dscp map to tc.

Patch 4# supports querying FEC statistics by command "ethtool -I --show-fec eth0".

Patch 5# supports querying and setting Serdes lane number.

Change logs:
V1 -> V2:
 - fix build error of patch 1# reported by robot lkp@intel.com.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2022-09-07 16:20:15 +01:00
commit 418b0866cc
16 changed files with 585 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
drivers/net/ethernet/hisilicon/hns3/hnae3.h
View File

@ -97,6 +97,8 @@ enum HNAE3_DEV_CAP_BITS {
HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B,
HNAE3_DEV_SUPPORT_MC_MAC_MNG_B,
HNAE3_DEV_SUPPORT_CQ_B,
HNAE3_DEV_SUPPORT_FEC_STATS_B,
HNAE3_DEV_SUPPORT_LANE_NUM_B,
};
#define hnae3_ae_dev_fd_supported(ae_dev) \
@ -159,6 +161,12 @@ enum HNAE3_DEV_CAP_BITS {
#define hnae3_ae_dev_cq_supported(ae_dev) \
test_bit(HNAE3_DEV_SUPPORT_CQ_B, (ae_dev)->caps)
#define hnae3_ae_dev_fec_stats_supported(ae_dev) \
test_bit(HNAE3_DEV_SUPPORT_FEC_STATS_B, (ae_dev)->caps)
#define hnae3_ae_dev_lane_num_supported(ae_dev) \
test_bit(HNAE3_DEV_SUPPORT_LANE_NUM_B, (ae_dev)->caps)
enum HNAE3_PF_CAP_BITS {
HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0,
};
@ -272,6 +280,7 @@ enum hnae3_dbg_cmd {
HNAE3_DBG_CMD_TC_SCH_INFO,
HNAE3_DBG_CMD_QOS_PAUSE_CFG,
HNAE3_DBG_CMD_QOS_PRI_MAP,
HNAE3_DBG_CMD_QOS_DSCP_MAP,
HNAE3_DBG_CMD_QOS_BUF_CFG,
HNAE3_DBG_CMD_DEV_INFO,
HNAE3_DBG_CMD_TX_BD,
@ -310,6 +319,11 @@ enum hnae3_dbg_cmd {
HNAE3_DBG_CMD_UNKNOWN,
};
enum hnae3_tc_map_mode {
HNAE3_TC_MAP_MODE_PRIO,
HNAE3_TC_MAP_MODE_DSCP,
};
struct hnae3_vector_info {
u8 __iomem *io_addr;
int vector;
@ -562,14 +576,17 @@ struct hnae3_ae_ops {
void (*client_stop)(struct hnae3_handle *handle);
int (*get_status)(struct hnae3_handle *handle);
void (*get_ksettings_an_result)(struct hnae3_handle *handle,
u8 *auto_neg, u32 *speed, u8 *duplex);
u8 *auto_neg, u32 *speed, u8 *duplex,
u32 *lane_num);
int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
u8 duplex);
u8 duplex, u8 lane_num);
void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
u8 *module_type);
int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
void (*get_fec_stats)(struct hnae3_handle *handle,
struct ethtool_fec_stats *fec_stats);
void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
u8 *fec_mode);
int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
@ -739,6 +756,8 @@ struct hnae3_ae_ops {
int (*get_link_diagnosis_info)(struct hnae3_handle *handle,
u32 *status_code);
void (*clean_vf_config)(struct hnae3_ae_dev *ae_dev, int num_vfs);
int (*get_dscp_prio)(struct hnae3_handle *handle, u8 dscp,
u8 *tc_map_mode, u8 *priority);
};
struct hnae3_dcb_ops {
@ -747,6 +766,8 @@ struct hnae3_dcb_ops {
int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
int (*ieee_setapp)(struct hnae3_handle *h, struct dcb_app *app);
int (*ieee_delapp)(struct hnae3_handle *h, struct dcb_app *app);
/* DCBX configuration */
u8 (*getdcbx)(struct hnae3_handle *);
@ -786,6 +807,7 @@ struct hnae3_knic_private_info {
u32 tx_spare_buf_size;
struct hnae3_tc_info tc_info;
u8 tc_map_mode;
u16 num_tqps; /* total number of TQPs in this handle */
struct hnae3_queue **tqp; /* array base of all TQPs in this instance */

2
drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c
View File

@ -153,6 +153,8 @@ static const struct hclge_comm_caps_bit_map hclge_pf_cmd_caps[] = {
{HCLGE_COMM_CAP_CQ_B, HNAE3_DEV_SUPPORT_CQ_B},
{HCLGE_COMM_CAP_GRO_B, HNAE3_DEV_SUPPORT_GRO_B},
{HCLGE_COMM_CAP_FD_B, HNAE3_DEV_SUPPORT_FD_B},
{HCLGE_COMM_CAP_FEC_STATS_B, HNAE3_DEV_SUPPORT_FEC_STATS_B},
{HCLGE_COMM_CAP_LANE_NUM_B, HNAE3_DEV_SUPPORT_LANE_NUM_B},
};
static const struct hclge_comm_caps_bit_map hclge_vf_cmd_caps[] = {

3
drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h
View File

@ -103,6 +103,7 @@ enum hclge_opcode_type {
HCLGE_OPC_MAC_TNL_INT_EN = 0x0311,
HCLGE_OPC_CLEAR_MAC_TNL_INT = 0x0312,
HCLGE_OPC_COMMON_LOOPBACK = 0x0315,
HCLGE_OPC_QUERY_FEC_STATS = 0x0316,
HCLGE_OPC_CONFIG_FEC_MODE = 0x031A,
HCLGE_OPC_QUERY_ROH_TYPE_INFO = 0x0389,
@ -342,6 +343,8 @@ enum HCLGE_COMM_CAP_BITS {
HCLGE_COMM_CAP_CQ_B = 18,
HCLGE_COMM_CAP_GRO_B = 20,
HCLGE_COMM_CAP_FD_B = 21,
HCLGE_COMM_CAP_FEC_STATS_B = 25,
HCLGE_COMM_CAP_LANE_NUM_B = 27,
};
enum HCLGE_COMM_API_CAP_BITS {

28
drivers/net/ethernet/hisilicon/hns3/hns3_dcbnl.c
View File

@ -56,6 +56,32 @@ static int hns3_dcbnl_ieee_setpfc(struct net_device *ndev, struct ieee_pfc *pfc)
return -EOPNOTSUPP;
}
static int hns3_dcbnl_ieee_setapp(struct net_device *ndev, struct dcb_app *app)
{
struct hnae3_handle *h = hns3_get_handle(ndev);
if (hns3_nic_resetting(ndev))
return -EBUSY;
if (h->kinfo.dcb_ops->ieee_setapp)
return h->kinfo.dcb_ops->ieee_setapp(h, app);
return -EOPNOTSUPP;
}
static int hns3_dcbnl_ieee_delapp(struct net_device *ndev, struct dcb_app *app)
{
struct hnae3_handle *h = hns3_get_handle(ndev);
if (hns3_nic_resetting(ndev))
return -EBUSY;
if (h->kinfo.dcb_ops->ieee_setapp)
return h->kinfo.dcb_ops->ieee_delapp(h, app);
return -EOPNOTSUPP;
}
/* DCBX configuration */
static u8 hns3_dcbnl_getdcbx(struct net_device *ndev)
{
@ -83,6 +109,8 @@ static const struct dcbnl_rtnl_ops hns3_dcbnl_ops = {
.ieee_setets = hns3_dcbnl_ieee_setets,
.ieee_getpfc = hns3_dcbnl_ieee_getpfc,
.ieee_setpfc = hns3_dcbnl_ieee_setpfc,
.ieee_setapp = hns3_dcbnl_ieee_setapp,
.ieee_delapp = hns3_dcbnl_ieee_delapp,
.getdcbx = hns3_dcbnl_getdcbx,
.setdcbx = hns3_dcbnl_setdcbx,
};

13
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
View File

@ -105,6 +105,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = {
.buf_len = HNS3_DBG_READ_LEN,
.init = hns3_dbg_common_file_init,
},
{
.name = "qos_dscp_map",
.cmd = HNAE3_DBG_CMD_QOS_DSCP_MAP,
.dentry = HNS3_DBG_DENTRY_TM,
.buf_len = HNS3_DBG_READ_LEN,
.init = hns3_dbg_common_file_init,
},
{
.name = "qos_buf_cfg",
.cmd = HNAE3_DBG_CMD_QOS_BUF_CFG,
@ -395,6 +402,12 @@ static struct hns3_dbg_cap_info hns3_dbg_cap[] = {
}, {
.name = "support modify vlan filter state",
.cap_bit = HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B,
}, {
.name = "support FEC statistics",
.cap_bit = HNAE3_DEV_SUPPORT_FEC_STATS_B,
}, {
.name = "support lane num",
.cap_bit = HNAE3_DEV_SUPPORT_LANE_NUM_B,
}
};

46
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
View File

@ -2963,6 +2963,51 @@ static int hns3_nic_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
return h->ae_algo->ops->set_vf_mac(h, vf_id, mac);
}
#define HNS3_INVALID_DSCP 0xff
#define HNS3_DSCP_SHIFT 2
static u8 hns3_get_skb_dscp(struct sk_buff *skb)
{
__be16 protocol = skb->protocol;
u8 dscp = HNS3_INVALID_DSCP;
if (protocol == htons(ETH_P_8021Q))
protocol = vlan_get_protocol(skb);
if (protocol == htons(ETH_P_IP))
dscp = ipv4_get_dsfield(ip_hdr(skb)) >> HNS3_DSCP_SHIFT;
else if (protocol == htons(ETH_P_IPV6))
dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> HNS3_DSCP_SHIFT;
return dscp;
}
static u16 hns3_nic_select_queue(struct net_device *netdev,
struct sk_buff *skb,
struct net_device *sb_dev)
{
struct hnae3_handle *h = hns3_get_handle(netdev);
u8 dscp, priority;
int ret;
if (h->kinfo.tc_map_mode != HNAE3_TC_MAP_MODE_DSCP ||
!h->ae_algo->ops->get_dscp_prio)
goto out;
dscp = hns3_get_skb_dscp(skb);
if (unlikely(dscp == HNS3_INVALID_DSCP))
goto out;
ret = h->ae_algo->ops->get_dscp_prio(h, dscp, NULL, &priority);
if (ret)
goto out;
skb->priority = priority;
out:
return netdev_pick_tx(netdev, skb, sb_dev);
}
static const struct net_device_ops hns3_nic_netdev_ops = {
.ndo_open = hns3_nic_net_open,
.ndo_stop = hns3_nic_net_stop,
@ -2988,6 +3033,7 @@ static const struct net_device_ops hns3_nic_netdev_ops = {
.ndo_set_vf_link_state = hns3_nic_set_vf_link_state,
.ndo_set_vf_rate = hns3_nic_set_vf_rate,
.ndo_set_vf_mac = hns3_nic_set_vf_mac,
.ndo_select_queue = hns3_nic_select_queue,
};
bool hns3_is_phys_func(struct pci_dev *pdev)

33
drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c
View File

@ -712,7 +712,8 @@ static void hns3_get_ksettings(struct hnae3_handle *h,
ops->get_ksettings_an_result(h,
&cmd->base.autoneg,
&cmd->base.speed,
&cmd->base.duplex);
&cmd->base.duplex,
&cmd->lanes);
/* 2.get link mode */
if (ops->get_link_mode)
@ -794,6 +795,7 @@ static int hns3_check_ksettings_param(const struct net_device *netdev,
const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
u8 module_type = HNAE3_MODULE_TYPE_UNKNOWN;
u8 media_type = HNAE3_MEDIA_TYPE_UNKNOWN;
u32 lane_num;
u8 autoneg;
u32 speed;
u8 duplex;
@ -806,9 +808,9 @@ static int hns3_check_ksettings_param(const struct net_device *netdev,
return 0;
if (ops->get_ksettings_an_result) {
ops->get_ksettings_an_result(handle, &autoneg, &speed, &duplex);
ops->get_ksettings_an_result(handle, &autoneg, &speed, &duplex, &lane_num);
if (cmd->base.autoneg == autoneg && cmd->base.speed == speed &&
cmd->base.duplex == duplex)
cmd->base.duplex == duplex && cmd->lanes == lane_num)
return 0;
}
@ -845,10 +847,14 @@ static int hns3_set_link_ksettings(struct net_device *netdev,
if (cmd->base.speed == SPEED_1000 && cmd->base.duplex == DUPLEX_HALF)
return -EINVAL;
if (cmd->lanes && !hnae3_ae_dev_lane_num_supported(ae_dev))
return -EOPNOTSUPP;
netif_dbg(handle, drv, netdev,
"set link(%s): autoneg=%u, speed=%u, duplex=%u\n",
"set link(%s): autoneg=%u, speed=%u, duplex=%u, lanes=%u\n",
netdev->phydev ? "phy" : "mac",
cmd->base.autoneg, cmd->base.speed, cmd->base.duplex);
cmd->base.autoneg, cmd->base.speed, cmd->base.duplex,
cmd->lanes);
/* Only support ksettings_set for netdev with phy attached for now */
if (netdev->phydev) {
@ -886,7 +892,7 @@ static int hns3_set_link_ksettings(struct net_device *netdev,
if (ops->cfg_mac_speed_dup_h)
ret = ops->cfg_mac_speed_dup_h(handle, cmd->base.speed,
cmd->base.duplex);
cmd->base.duplex, (u8)(cmd->lanes));
return ret;
}
@ -1612,6 +1618,19 @@ static void hns3_set_msglevel(struct net_device *netdev, u32 msg_level)
h->msg_enable = msg_level;
}
static void hns3_get_fec_stats(struct net_device *netdev,
struct ethtool_fec_stats *fec_stats)
{
struct hnae3_handle *handle = hns3_get_handle(netdev);
struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
if (!hnae3_ae_dev_fec_stats_supported(ae_dev) || !ops->get_fec_stats)
return;
ops->get_fec_stats(handle, fec_stats);
}
/* Translate local fec value into ethtool value. */
static unsigned int loc_to_eth_fec(u8 loc_fec)
{
@ -2054,6 +2073,7 @@ static const struct ethtool_ops hns3vf_ethtool_ops = {
static const struct ethtool_ops hns3_ethtool_ops = {
.supported_coalesce_params = HNS3_ETHTOOL_COALESCE,
.supported_ring_params = HNS3_ETHTOOL_RING,
.cap_link_lanes_supported = true,
.self_test = hns3_self_test,
.get_drvinfo = hns3_get_drvinfo,
.get_link = hns3_get_link,
@ -2084,6 +2104,7 @@ static const struct ethtool_ops hns3_ethtool_ops = {
.set_msglevel = hns3_set_msglevel,
.get_fecparam = hns3_get_fecparam,
.set_fecparam = hns3_set_fecparam,
.get_fec_stats = hns3_get_fec_stats,
.get_module_info = hns3_get_module_info,
.get_module_eeprom = hns3_get_module_eeprom,
.get_priv_flags = hns3_get_priv_flags,

21
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
View File

@ -321,7 +321,9 @@ struct hclge_config_mac_speed_dup_cmd {
#define HCLGE_CFG_MAC_SPEED_CHANGE_EN_B 0
u8 mac_change_fec_en;
u8 rsv[22];
u8 rsv[4];
u8 lane_num;
u8 rsv1[17];
};
#define HCLGE_TQP_ENABLE_B 0
@ -348,7 +350,8 @@ struct hclge_sfp_info_cmd {
__le32 speed_ability; /* speed ability for current media */
__le32 module_type;
u8 fec_ability;
u8 rsv[7];
u8 lane_num;
u8 rsv[6];
};
#define HCLGE_MAC_CFG_FEC_AUTO_EN_B 0
@ -367,6 +370,20 @@ struct hclge_config_fec_cmd {
u8 rsv[22];
};
#define HCLGE_FEC_STATS_CMD_NUM 4
struct hclge_query_fec_stats_cmd {
/* fec rs mode total stats */
__le32 rs_fec_corr_blocks;
__le32 rs_fec_uncorr_blocks;
__le32 rs_fec_error_blocks;
/* fec base-r mode per lanes stats */
u8 base_r_lane_num;
u8 rsv[3];
__le32 base_r_fec_corr_blocks;
__le32 base_r_fec_uncorr_blocks;
};
#define HCLGE_MAC_UPLINK_PORT 0x100
struct hclge_config_max_frm_size_cmd {

89
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
View File

@ -359,6 +359,93 @@ static int hclge_ieee_setpfc(struct hnae3_handle *h, struct ieee_pfc *pfc)
return hclge_notify_client(hdev, HNAE3_UP_CLIENT);
}
static int hclge_ieee_setapp(struct hnae3_handle *h, struct dcb_app *app)
{
struct hclge_vport *vport = hclge_get_vport(h);
struct net_device *netdev = h->kinfo.netdev;
struct hclge_dev *hdev = vport->back;
struct dcb_app old_app;
int ret;
if (app->selector != IEEE_8021QAZ_APP_SEL_DSCP ||
app->protocol >= HCLGE_MAX_DSCP ||
app->priority >= HNAE3_MAX_USER_PRIO)
return -EINVAL;
dev_info(&hdev->pdev->dev, "setapp dscp=%u priority=%u\n",
app->protocol, app->priority);
if (app->priority == hdev->tm_info.dscp_prio[app->protocol])
return 0;
ret = dcb_ieee_setapp(netdev, app);
if (ret)
return ret;
old_app.selector = IEEE_8021QAZ_APP_SEL_DSCP;
old_app.protocol = app->protocol;
old_app.priority = hdev->tm_info.dscp_prio[app->protocol];
hdev->tm_info.dscp_prio[app->protocol] = app->priority;
ret = hclge_dscp_to_tc_map(hdev);
if (ret) {
dev_err(&hdev->pdev->dev,
"failed to set dscp to tc map, ret = %d\n", ret);
hdev->tm_info.dscp_prio[app->protocol] = old_app.priority;
(void)dcb_ieee_delapp(netdev, app);
return ret;
}
vport->nic.kinfo.tc_map_mode = HNAE3_TC_MAP_MODE_DSCP;
if (old_app.priority == HCLGE_PRIO_ID_INVALID)
hdev->tm_info.dscp_app_cnt++;
else
ret = dcb_ieee_delapp(netdev, &old_app);
return ret;
}
static int hclge_ieee_delapp(struct hnae3_handle *h, struct dcb_app *app)
{
struct hclge_vport *vport = hclge_get_vport(h);
struct net_device *netdev = h->kinfo.netdev;
struct hclge_dev *hdev = vport->back;
int ret;
if (app->selector != IEEE_8021QAZ_APP_SEL_DSCP ||
app->protocol >= HCLGE_MAX_DSCP ||
app->priority >= HNAE3_MAX_USER_PRIO ||
app->priority != hdev->tm_info.dscp_prio[app->protocol])
return -EINVAL;
dev_info(&hdev->pdev->dev, "delapp dscp=%u priority=%u\n",
app->protocol, app->priority);
ret = dcb_ieee_delapp(netdev, app);
if (ret)
return ret;
hdev->tm_info.dscp_prio[app->protocol] = HCLGE_PRIO_ID_INVALID;
ret = hclge_dscp_to_tc_map(hdev);
if (ret) {
dev_err(&hdev->pdev->dev,
"failed to del dscp to tc map, ret = %d\n", ret);
hdev->tm_info.dscp_prio[app->protocol] = app->priority;
(void)dcb_ieee_setapp(netdev, app);
return ret;
}
if (hdev->tm_info.dscp_app_cnt)
hdev->tm_info.dscp_app_cnt--;
if (!hdev->tm_info.dscp_app_cnt) {
vport->nic.kinfo.tc_map_mode = HNAE3_TC_MAP_MODE_PRIO;
ret = hclge_up_to_tc_map(hdev);
}
return ret;
}
/* DCBX configuration */
static u8 hclge_getdcbx(struct hnae3_handle *h)
{
@ -543,6 +630,8 @@ static const struct hnae3_dcb_ops hns3_dcb_ops = {
.ieee_setets = hclge_ieee_setets,
.ieee_getpfc = hclge_ieee_getpfc,
.ieee_setpfc = hclge_ieee_setpfc,
.ieee_setapp = hclge_ieee_setapp,
.ieee_delapp = hclge_ieee_delapp,
.getdcbx = hclge_getdcbx,
.setdcbx = hclge_setdcbx,
.setup_tc = hclge_setup_tc,

60
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
View File

@ -14,6 +14,8 @@ static const char * const hclge_mac_state_str[] = {
"TO_ADD", "TO_DEL", "ACTIVE"
};
static const char * const tc_map_mode_str[] = { "PRIO", "DSCP" };
static const struct hclge_dbg_reg_type_info hclge_dbg_reg_info[] = {
{ .cmd = HNAE3_DBG_CMD_REG_BIOS_COMMON,
.dfx_msg = &hclge_dbg_bios_common_reg[0],
@ -1115,10 +1117,11 @@ static int hclge_dbg_dump_qos_pause_cfg(struct hclge_dev *hdev, char *buf,
return 0;
}
#define HCLGE_DBG_TC_MASK 0x0F
static int hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev, char *buf,
int len)
{
#define HCLGE_DBG_TC_MASK 0x0F
#define HCLGE_DBG_TC_BIT_WIDTH 4
struct hclge_qos_pri_map_cmd *pri_map;
@ -1152,6 +1155,57 @@ static int hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev, char *buf,
return 0;
}
static int hclge_dbg_dump_qos_dscp_map(struct hclge_dev *hdev, char *buf,
int len)
{
struct hclge_desc desc[HCLGE_DSCP_MAP_TC_BD_NUM];
u8 *req0 = (u8 *)desc[0].data;
u8 *req1 = (u8 *)desc[1].data;
u8 dscp_tc[HCLGE_MAX_DSCP];
int pos, ret;
u8 i, j;
pos = scnprintf(buf, len, "tc map mode: %s\n",
tc_map_mode_str[hdev->vport[0].nic.kinfo.tc_map_mode]);
if (hdev->vport[0].nic.kinfo.tc_map_mode != HNAE3_TC_MAP_MODE_DSCP)
return 0;
hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_QOS_MAP, true);
desc[0].flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT);
hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_QOS_MAP, true);
ret = hclge_cmd_send(&hdev->hw, desc, HCLGE_DSCP_MAP_TC_BD_NUM);
if (ret) {
dev_err(&hdev->pdev->dev,
"failed to dump qos dscp map, ret = %d\n", ret);
return ret;
}
pos += scnprintf(buf + pos, len - pos, "\nDSCP PRIO TC\n");
/* The low 32 dscp setting use bd0, high 32 dscp setting use bd1 */
for (i = 0; i < HCLGE_MAX_DSCP / HCLGE_DSCP_MAP_TC_BD_NUM; i++) {
j = i + HCLGE_MAX_DSCP / HCLGE_DSCP_MAP_TC_BD_NUM;
/* Each dscp setting has 4 bits, so each byte saves two dscp
* setting
*/
dscp_tc[i] = req0[i >> 1] >> HCLGE_DSCP_TC_SHIFT(i);
dscp_tc[j] = req1[i >> 1] >> HCLGE_DSCP_TC_SHIFT(i);
dscp_tc[i] &= HCLGE_DBG_TC_MASK;
dscp_tc[j] &= HCLGE_DBG_TC_MASK;
}
for (i = 0; i < HCLGE_MAX_DSCP; i++) {
if (hdev->tm_info.dscp_prio[i] == HCLGE_PRIO_ID_INVALID)
continue;
pos += scnprintf(buf + pos, len - pos, " %2u %u %u\n",
i, hdev->tm_info.dscp_prio[i], dscp_tc[i]);
}
return 0;
}
static int hclge_dbg_dump_tx_buf_cfg(struct hclge_dev *hdev, char *buf, int len)
{
struct hclge_tx_buff_alloc_cmd *tx_buf_cmd;
@ -2376,6 +2430,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = {
.cmd = HNAE3_DBG_CMD_QOS_PRI_MAP,
.dbg_dump = hclge_dbg_dump_qos_pri_map,
},
{
.cmd = HNAE3_DBG_CMD_QOS_DSCP_MAP,
.dbg_dump = hclge_dbg_dump_qos_dscp_map,
},
{
.cmd = HNAE3_DBG_CMD_QOS_BUF_CFG,
.dbg_dump = hclge_dbg_dump_qos_buf_cfg,

201
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
View File

@ -71,6 +71,7 @@ static void hclge_sync_mac_table(struct hclge_dev *hdev);
static void hclge_restore_hw_table(struct hclge_dev *hdev);
static void hclge_sync_promisc_mode(struct hclge_dev *hdev);
static void hclge_sync_fd_table(struct hclge_dev *hdev);
static void hclge_update_fec_stats(struct hclge_dev *hdev);
static struct hnae3_ae_algo ae_algo;
@ -679,6 +680,8 @@ static void hclge_update_stats_for_all(struct hclge_dev *hdev)
}
}
hclge_update_fec_stats(hdev);
status = hclge_mac_update_stats(hdev);
if (status)
dev_err(&hdev->pdev->dev,
@ -2612,7 +2615,7 @@ static int hclge_convert_to_fw_speed(u32 speed_drv, u32 *speed_fw)
}
static int hclge_cfg_mac_speed_dup_hw(struct hclge_dev *hdev, int speed,
u8 duplex)
u8 duplex, u8 lane_num)
{
struct hclge_config_mac_speed_dup_cmd *req;
struct hclge_desc desc;
@ -2636,6 +2639,7 @@ static int hclge_cfg_mac_speed_dup_hw(struct hclge_dev *hdev, int speed,
speed_fw);
hnae3_set_bit(req->mac_change_fec_en, HCLGE_CFG_MAC_SPEED_CHANGE_EN_B,
1);
req->lane_num = lane_num;
ret = hclge_cmd_send(&hdev->hw, &desc, 1);
if (ret) {
@ -2647,33 +2651,35 @@ static int hclge_cfg_mac_speed_dup_hw(struct hclge_dev *hdev, int speed,
return 0;
}
int hclge_cfg_mac_speed_dup(struct hclge_dev *hdev, int speed, u8 duplex)
int hclge_cfg_mac_speed_dup(struct hclge_dev *hdev, int speed, u8 duplex, u8 lane_num)
{
struct hclge_mac *mac = &hdev->hw.mac;
int ret;
duplex = hclge_check_speed_dup(duplex, speed);
if (!mac->support_autoneg && mac->speed == speed &&
mac->duplex == duplex)
mac->duplex == duplex && (mac->lane_num == lane_num || lane_num == 0))
return 0;
ret = hclge_cfg_mac_speed_dup_hw(hdev, speed, duplex);
ret = hclge_cfg_mac_speed_dup_hw(hdev, speed, duplex, lane_num);
if (ret)
return ret;
hdev->hw.mac.speed = speed;
hdev->hw.mac.duplex = duplex;
if (!lane_num)
hdev->hw.mac.lane_num = lane_num;
return 0;
}
static int hclge_cfg_mac_speed_dup_h(struct hnae3_handle *handle, int speed,
u8 duplex)
u8 duplex, u8 lane_num)
{
struct hclge_vport *vport = hclge_get_vport(handle);
struct hclge_dev *hdev = vport->back;
return hclge_cfg_mac_speed_dup(hdev, speed, duplex);
return hclge_cfg_mac_speed_dup(hdev, speed, duplex, lane_num);
}
static int hclge_set_autoneg_en(struct hclge_dev *hdev, bool enable)
@ -2753,6 +2759,157 @@ static int hclge_halt_autoneg(struct hnae3_handle *handle, bool halt)
return 0;
}
static void hclge_parse_fec_stats_lanes(struct hclge_dev *hdev,
struct hclge_desc *desc, u32 desc_len)
{
u32 lane_size = HCLGE_FEC_STATS_MAX_LANES * 2;
u32 desc_index = 0;
u32 data_index = 0;
u32 i;
for (i = 0; i < lane_size; i++) {
if (data_index >= HCLGE_DESC_DATA_LEN) {
desc_index++;
data_index = 0;
}
if (desc_index >= desc_len)
return;
hdev->fec_stats.per_lanes[i] +=
le32_to_cpu(desc[desc_index].data[data_index]);
data_index++;
}
}
static void hclge_parse_fec_stats(struct hclge_dev *hdev,
struct hclge_desc *desc, u32 desc_len)
{
struct hclge_query_fec_stats_cmd *req;
req = (struct hclge_query_fec_stats_cmd *)desc[0].data;
hdev->fec_stats.base_r_lane_num = req->base_r_lane_num;
hdev->fec_stats.rs_corr_blocks +=
le32_to_cpu(req->rs_fec_corr_blocks);
hdev->fec_stats.rs_uncorr_blocks +=
le32_to_cpu(req->rs_fec_uncorr_blocks);
hdev->fec_stats.rs_error_blocks +=
le32_to_cpu(req->rs_fec_error_blocks);
hdev->fec_stats.base_r_corr_blocks +=
le32_to_cpu(req->base_r_fec_corr_blocks);
hdev->fec_stats.base_r_uncorr_blocks +=
le32_to_cpu(req->base_r_fec_uncorr_blocks);
hclge_parse_fec_stats_lanes(hdev, &desc[1], desc_len - 1);
}
static int hclge_update_fec_stats_hw(struct hclge_dev *hdev)
{
struct hclge_desc desc[HCLGE_FEC_STATS_CMD_NUM];
int ret;
u32 i;
for (i = 0; i < HCLGE_FEC_STATS_CMD_NUM; i++) {
hclge_cmd_setup_basic_desc(&desc[i], HCLGE_OPC_QUERY_FEC_STATS,
true);
if (i != (HCLGE_FEC_STATS_CMD_NUM - 1))
desc[i].flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT);
}
ret = hclge_cmd_send(&hdev->hw, desc, HCLGE_FEC_STATS_CMD_NUM);
if (ret)
return ret;
hclge_parse_fec_stats(hdev, desc, HCLGE_FEC_STATS_CMD_NUM);
return 0;
}
static void hclge_update_fec_stats(struct hclge_dev *hdev)
{
struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);
int ret;
if (!hnae3_ae_dev_fec_stats_supported(ae_dev) ||
test_and_set_bit(HCLGE_STATE_FEC_STATS_UPDATING, &hdev->state))
return;
ret = hclge_update_fec_stats_hw(hdev);
if (ret)
dev_err(&hdev->pdev->dev,
"failed to update fec stats, ret = %d\n", ret);
clear_bit(HCLGE_STATE_FEC_STATS_UPDATING, &hdev->state);
}
static void hclge_get_fec_stats_total(struct hclge_dev *hdev,
struct ethtool_fec_stats *fec_stats)
{
fec_stats->corrected_blocks.total = hdev->fec_stats.rs_corr_blocks;
fec_stats->uncorrectable_blocks.total =
hdev->fec_stats.rs_uncorr_blocks;
}
static void hclge_get_fec_stats_lanes(struct hclge_dev *hdev,
struct ethtool_fec_stats *fec_stats)
{
u32 i;
if (hdev->fec_stats.base_r_lane_num == 0 ||
hdev->fec_stats.base_r_lane_num > HCLGE_FEC_STATS_MAX_LANES) {
dev_err(&hdev->pdev->dev,
"fec stats lane number(%llu) is invalid\n",
hdev->fec_stats.base_r_lane_num);
return;
}
for (i = 0; i < hdev->fec_stats.base_r_lane_num; i++) {
fec_stats->corrected_blocks.lanes[i] =
hdev->fec_stats.base_r_corr_per_lanes[i];
fec_stats->uncorrectable_blocks.lanes[i] =
hdev->fec_stats.base_r_uncorr_per_lanes[i];
}
}
static void hclge_comm_get_fec_stats(struct hclge_dev *hdev,
struct ethtool_fec_stats *fec_stats)
{
u32 fec_mode = hdev->hw.mac.fec_mode;
switch (fec_mode) {
case BIT(HNAE3_FEC_RS):
case BIT(HNAE3_FEC_LLRS):
hclge_get_fec_stats_total(hdev, fec_stats);
break;
case BIT(HNAE3_FEC_BASER):
hclge_get_fec_stats_lanes(hdev, fec_stats);
break;
default:
dev_err(&hdev->pdev->dev,
"fec stats is not supported by current fec mode(0x%x)\n",
fec_mode);
break;
}
}
static void hclge_get_fec_stats(struct hnae3_handle *handle,
struct ethtool_fec_stats *fec_stats)
{
struct hclge_vport *vport = hclge_get_vport(handle);
struct hclge_dev *hdev = vport->back;
u32 fec_mode = hdev->hw.mac.fec_mode;
if (fec_mode == BIT(HNAE3_FEC_NONE) ||
fec_mode == BIT(HNAE3_FEC_AUTO) ||
fec_mode == BIT(HNAE3_FEC_USER_DEF))
return;
hclge_update_fec_stats(hdev);
hclge_comm_get_fec_stats(hdev, fec_stats);
}
static int hclge_set_fec_hw(struct hclge_dev *hdev, u32 fec_mode)
{
struct hclge_config_fec_cmd *req;
@ -2822,7 +2979,7 @@ static int hclge_mac_init(struct hclge_dev *hdev)
hdev->support_sfp_query = true;
hdev->hw.mac.duplex = HCLGE_MAC_FULL;
ret = hclge_cfg_mac_speed_dup_hw(hdev, hdev->hw.mac.speed,
hdev->hw.mac.duplex);
hdev->hw.mac.duplex, hdev->hw.mac.lane_num);
if (ret)
return ret;
@ -3147,6 +3304,7 @@ static int hclge_get_sfp_info(struct hclge_dev *hdev, struct hclge_mac *mac)
mac->autoneg = resp->autoneg;
mac->support_autoneg = resp->autoneg_ability;
mac->speed_type = QUERY_ACTIVE_SPEED;
mac->lane_num = resp->lane_num;
if (!resp->active_fec)
mac->fec_mode = 0;
else
@ -3331,13 +3489,13 @@ static int hclge_update_port_info(struct hclge_dev *hdev)
return 0;
}
return hclge_cfg_mac_speed_dup(hdev, mac->speed,
HCLGE_MAC_FULL);
HCLGE_MAC_FULL, mac->lane_num);
} else {
if (speed == HCLGE_MAC_SPEED_UNKNOWN)
return 0; /* do nothing if no SFP */
/* must config full duplex for SFP */
return hclge_cfg_mac_speed_dup(hdev, speed, HCLGE_MAC_FULL);
return hclge_cfg_mac_speed_dup(hdev, speed, HCLGE_MAC_FULL, 0);
}
}
@ -10831,7 +10989,7 @@ static int hclge_set_pauseparam(struct hnae3_handle *handle, u32 auto_neg,
}
static void hclge_get_ksettings_an_result(struct hnae3_handle *handle,
u8 *auto_neg, u32 *speed, u8 *duplex)
u8 *auto_neg, u32 *speed, u8 *duplex, u32 *lane_num)
{
struct hclge_vport *vport = hclge_get_vport(handle);
struct hclge_dev *hdev = vport->back;
@ -10842,6 +11000,8 @@ static void hclge_get_ksettings_an_result(struct hnae3_handle *handle,
*duplex = hdev->hw.mac.duplex;
if (auto_neg)
*auto_neg = hdev->hw.mac.autoneg;
if (lane_num)
*lane_num = hdev->hw.mac.lane_num;
}
static void hclge_get_media_type(struct hnae3_handle *handle, u8 *media_type,
@ -11552,6 +11712,7 @@ out:
static void hclge_stats_clear(struct hclge_dev *hdev)
{
memset(&hdev->mac_stats, 0, sizeof(hdev->mac_stats));
memset(&hdev->fec_stats, 0, sizeof(hdev->fec_stats));
}
static int hclge_set_mac_spoofchk(struct hclge_dev *hdev, int vf, bool enable)
@ -12805,6 +12966,24 @@ static void hclge_clean_vport_config(struct hnae3_ae_dev *ae_dev, int num_vfs)
}
}
static int hclge_get_dscp_prio(struct hnae3_handle *h, u8 dscp, u8 *tc_mode,
u8 *priority)
{
struct hclge_vport *vport = hclge_get_vport(h);
struct hclge_dev *hdev = vport->back;
if (dscp >= HCLGE_MAX_DSCP)
return -EINVAL;
if (tc_mode)
*tc_mode = vport->nic.kinfo.tc_map_mode;
if (priority)
*priority = hdev->tm_info.dscp_prio[dscp] == HCLGE_PRIO_ID_INVALID ? 0 :
hdev->tm_info.dscp_prio[dscp];
return 0;
}
static const struct hnae3_ae_ops hclge_ops = {
.init_ae_dev = hclge_init_ae_dev,
.uninit_ae_dev = hclge_uninit_ae_dev,
@ -12828,6 +13007,7 @@ static const struct hnae3_ae_ops hclge_ops = {
.cfg_mac_speed_dup_h = hclge_cfg_mac_speed_dup_h,
.get_media_type = hclge_get_media_type,
.check_port_speed = hclge_check_port_speed,
.get_fec_stats = hclge_get_fec_stats,
.get_fec = hclge_get_fec,
.set_fec = hclge_set_fec,
.get_rss_key_size = hclge_comm_get_rss_key_size,
@ -12907,6 +13087,7 @@ static const struct hnae3_ae_ops hclge_ops = {
.get_ts_info = hclge_ptp_get_ts_info,
.get_link_diagnosis_info = hclge_get_link_diagnosis_info,
.clean_vf_config = hclge_clean_vport_config,
.get_dscp_prio = hclge_get_dscp_prio,
};
static struct hnae3_ae_algo ae_algo = {

29
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
View File

@ -216,6 +216,7 @@ enum HCLGE_DEV_STATE {
HCLGE_STATE_FD_USER_DEF_CHANGED,
HCLGE_STATE_PTP_EN,
HCLGE_STATE_PTP_TX_HANDLING,
HCLGE_STATE_FEC_STATS_UPDATING,
HCLGE_STATE_MAX
};
@ -258,6 +259,7 @@ struct hclge_mac {
u8 duplex;
u8 support_autoneg;
u8 speed_type; /* 0: sfp speed, 1: active speed */
u8 lane_num;
u32 speed;
u32 max_speed;
u32 speed_ability; /* speed ability supported by current media */
@ -349,11 +351,15 @@ struct hclge_cfg {
u16 umv_space;
};
#define HCLGE_MAX_DSCP 64
#define HCLGE_PRIO_ID_INVALID 0xff
struct hclge_tm_info {
u8 num_tc;
u8 num_pg; /* It must be 1 if vNET-Base schd */
u8 dscp_app_cnt;
u8 pg_dwrr[HCLGE_PG_NUM];
u8 prio_tc[HNAE3_MAX_USER_PRIO];
u8 dscp_prio[HCLGE_MAX_DSCP];
struct hclge_pg_info pg_info[HCLGE_PG_NUM];
struct hclge_tc_info tc_info[HNAE3_MAX_TC];
enum hclge_fc_mode fc_mode;
@ -488,6 +494,26 @@ struct hclge_mac_stats {
#define HCLGE_STATS_TIMER_INTERVAL 300UL
/* fec stats ,opcode id: 0x0316 */
#define HCLGE_FEC_STATS_MAX_LANES 8
struct hclge_fec_stats {
/* fec rs mode total stats */
u64 rs_corr_blocks;
u64 rs_uncorr_blocks;
u64 rs_error_blocks;
/* fec base-r mode per lanes stats */
u64 base_r_lane_num;
u64 base_r_corr_blocks;
u64 base_r_uncorr_blocks;
union {
struct {
u64 base_r_corr_per_lanes[HCLGE_FEC_STATS_MAX_LANES];
u64 base_r_uncorr_per_lanes[HCLGE_FEC_STATS_MAX_LANES];
};
u64 per_lanes[HCLGE_FEC_STATS_MAX_LANES * 2];
};
};
struct hclge_vlan_type_cfg {
u16 rx_ot_fst_vlan_type;
u16 rx_ot_sec_vlan_type;
@ -826,6 +852,7 @@ struct hclge_dev {
struct hclge_hw hw;
struct hclge_misc_vector misc_vector;
struct hclge_mac_stats mac_stats;
struct hclge_fec_stats fec_stats;
unsigned long state;
unsigned long flr_state;
unsigned long last_reset_time;
@ -1070,7 +1097,7 @@ static inline int hclge_get_queue_id(struct hnae3_queue *queue)
}
int hclge_inform_reset_assert_to_vf(struct hclge_vport *vport);
int hclge_cfg_mac_speed_dup(struct hclge_dev *hdev, int speed, u8 duplex);
int hclge_cfg_mac_speed_dup(struct hclge_dev *hdev, int speed, u8 duplex, u8 lane_num);
int hclge_set_vlan_filter(struct hnae3_handle *handle, __be16 proto,
u16 vlan_id, bool is_kill);
int hclge_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable);

2
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
View File

@ -187,7 +187,7 @@ static void hclge_mac_adjust_link(struct net_device *netdev)
speed = netdev->phydev->speed;
duplex = netdev->phydev->duplex;
ret = hclge_cfg_mac_speed_dup(hdev, speed, duplex);
ret = hclge_cfg_mac_speed_dup(hdev, speed, duplex, 0);
if (ret)
netdev_err(netdev, "failed to adjust link.\n");

50
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
View File

@ -248,7 +248,7 @@ static int hclge_fill_pri_array(struct hclge_dev *hdev, u8 *pri, u8 pri_id)
return 0;
}
static int hclge_up_to_tc_map(struct hclge_dev *hdev)
int hclge_up_to_tc_map(struct hclge_dev *hdev)
{
struct hclge_desc desc;
u8 *pri = (u8 *)desc.data;
@ -266,6 +266,47 @@ static int hclge_up_to_tc_map(struct hclge_dev *hdev)
return hclge_cmd_send(&hdev->hw, &desc, 1);
}
static void hclge_dscp_to_prio_map_init(struct hclge_dev *hdev)
{
u8 i;
hdev->vport[0].nic.kinfo.tc_map_mode = HNAE3_TC_MAP_MODE_PRIO;
hdev->tm_info.dscp_app_cnt = 0;
for (i = 0; i < HCLGE_MAX_DSCP; i++)
hdev->tm_info.dscp_prio[i] = HCLGE_PRIO_ID_INVALID;
}
int hclge_dscp_to_tc_map(struct hclge_dev *hdev)
{
struct hclge_desc desc[HCLGE_DSCP_MAP_TC_BD_NUM];
u8 *req0 = (u8 *)desc[0].data;
u8 *req1 = (u8 *)desc[1].data;
u8 pri_id, tc_id, i, j;
hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_QOS_MAP, false);
desc[0].flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT);
hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_QOS_MAP, false);
/* The low 32 dscp setting use bd0, high 32 dscp setting use bd1 */
for (i = 0; i < HCLGE_MAX_DSCP / HCLGE_DSCP_MAP_TC_BD_NUM; i++) {
pri_id = hdev->tm_info.dscp_prio[i];
pri_id = pri_id == HCLGE_PRIO_ID_INVALID ? 0 : pri_id;
tc_id = hdev->tm_info.prio_tc[pri_id];
/* Each dscp setting has 4 bits, so each byte saves two dscp
* setting
*/
req0[i >> 1] |= tc_id << HCLGE_DSCP_TC_SHIFT(i);
j = i + HCLGE_MAX_DSCP / HCLGE_DSCP_MAP_TC_BD_NUM;
pri_id = hdev->tm_info.dscp_prio[j];
pri_id = pri_id == HCLGE_PRIO_ID_INVALID ? 0 : pri_id;
tc_id = hdev->tm_info.prio_tc[pri_id];
req1[i >> 1] |= tc_id << HCLGE_DSCP_TC_SHIFT(i);
}
return hclge_cmd_send(&hdev->hw, desc, HCLGE_DSCP_MAP_TC_BD_NUM);
}
static int hclge_tm_pg_to_pri_map_cfg(struct hclge_dev *hdev,
u8 pg_id, u8 pri_bit_map)
{
@ -1275,6 +1316,12 @@ static int hclge_tm_map_cfg(struct hclge_dev *hdev)
if (ret)
return ret;
if (hdev->vport[0].nic.kinfo.tc_map_mode == HNAE3_TC_MAP_MODE_DSCP) {
ret = hclge_dscp_to_tc_map(hdev);
if (ret)
return ret;
}
ret = hclge_tm_pg_to_pri_map(hdev);
if (ret)
return ret;
@ -1646,6 +1693,7 @@ int hclge_tm_schd_init(struct hclge_dev *hdev)
return -EINVAL;
hclge_tm_schd_info_init(hdev);
hclge_dscp_to_prio_map_init(hdev);
return hclge_tm_init_hw(hdev, true);
}

5
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
View File

@ -30,6 +30,9 @@ enum hclge_opcode_type;
#define HCLGE_TM_PF_MAX_PRI_NUM 8
#define HCLGE_TM_PF_MAX_QSET_NUM 8
#define HCLGE_DSCP_MAP_TC_BD_NUM 2
#define HCLGE_DSCP_TC_SHIFT(n) (((n) & 1) * 4)
struct hclge_pg_to_pri_link_cmd {
u8 pg_id;
u8 rsvd1[3];
@ -262,4 +265,6 @@ int hclge_tm_get_pg_shaper(struct hclge_dev *hdev, u8 pg_id,
struct hclge_tm_shaper_para *para);
int hclge_tm_get_port_shaper(struct hclge_dev *hdev,
struct hclge_tm_shaper_para *para);
int hclge_up_to_tc_map(struct hclge_dev *hdev);
int hclge_dscp_to_tc_map(struct hclge_dev *hdev);
#endif

2
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
View File

@ -3177,7 +3177,7 @@ static int hclgevf_get_status(struct hnae3_handle *handle)
static void hclgevf_get_ksettings_an_result(struct hnae3_handle *handle,
u8 *auto_neg, u32 *speed,
u8 *duplex)
u8 *duplex, u32 *lane_num)
{
struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);